Tunable Output Matching for Accurate On-Wafer PA Testing
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Solution Overview
Problem
Conventional power amplifier integrated circuits (ICs) undergo inaccurate on-wafer testing due to improper termination, leading to lower yield as viable ICs are misidentified and discarded.
Innovation Solution
Incorporating a tunable impedance matching network with a tunable inductor at the output of the power amplifier IC, which adjusts impedance to emulate a properly terminated load during testing and matches with the expected load impedance after packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional on-wafer testing is performed without impedance matching adjustment, then testing simplicity is maintained, but measurement precision deteriorates due to improper termination causing inaccurate output power measurements
Solution Approach 1:
The patent implements a tunable impedance matching network with adjustable inductance values that can be dynamically switched between different configurations. Multiple inductors with different inductance values are connected through switches, allowing the impedance matching network to be adjusted based on whether the device is in test mode or operational mode, thereby resolving the contradiction between measurement accuracy and circuit simplicity.
Solution Approach 2:
The patent changes the impedance parameters of the matching network by switching between different inductor configurations. During testing, the network is adjusted to provide proper termination for accurate measurements, while during normal operation, it provides the optimal impedance match for power amplification, thus improving measurement precision without permanently increasing device complexity.
2Adaptability or versatility
If a fixed impedance matching network is used, then device complexity is minimized, but adaptability deteriorates as the network cannot accommodate both testing and operational requirements
Solution Approach 1:
The patent designs an impedance matching network that serves multiple functions: it provides accurate impedance matching during on-wafer testing and maintains optimal matching during normal operational modes. By incorporating switchable inductor configurations, the same network structure adapts to different testing and operational requirements, achieving multi-functionality without proportionally increasing complexity.
Solution Approach 2:
The matching network transitions from a static fixed-impedance design to a dynamic adjustable design. Switches enable the network to reconfigure its inductance values based on the operational state (test mode vs. normal mode), providing the adaptability needed to handle different impedance requirements while maintaining a relatively compact structure.
3Manufacturing precision
If on-wafer testing is performed with improper termination, then productivity is maintained through quick testing, but manufacturing precision deteriorates as viable ICs are misidentified and discarded
Solution Approach 1:
The patent applies preliminary impedance matching adjustment before performing output power measurements during on-wafer testing. By pre-configuring the matching network to provide proper termination for the specific device under test, accurate measurements can be obtained quickly without requiring complex post-processing or retesting, thus improving die identification accuracy while maintaining testing efficiency.
Data Source
AI summary
A power amplifier integrated circuit with a tunable impedance matching network and associated methods of testing and operation are provided. The power amplifier integrated circuit includes a power amplifier having an output, an output node coupled to the output of the power amplifier, and a tunable impedance matching network. The tunable impedance matching network includes a tunable inductor coupled to the output node. The tunable inductor includes switches configured to selectively modify an inductance of the tunable inductor. The switches may be configured to modify the tunable inductor to have different inductances in respective testing and functional modes.


