Tungsten Etching via Mixed Mode Pulsing
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Solution Overview
Problem
Current methods for etching tungsten-containing layers in semiconductor devices face challenges in achieving high aspect ratio features with precise control over profile and loading, as existing passivation techniques often result in uneven etching and damage to sidewalls.
Innovation Solution
A method involving a mixed mode pulsing (MMP) process that includes passivation, breakthrough, and main etch steps, where a silicon precursor is adsorbed and oxygenated to form a silicon oxide passivation layer on sidewalls, protecting them during etching while allowing deeper etching of features by selectively removing the passivation layer from the bottoms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional passivation techniques are used during tungsten etching, then sidewalls are protected, but uneven etching and sidewall damage occur
Solution Approach 1:
The patent applies periodic action by implementing a pulsed etching process with alternating passivation and etching phases. During passivation phases, sidewalls are protected by depositing a dielectric material, and during etching phases, the tungsten is etched through. This periodic switching prevents continuous sidewall exposure to damaging etchants while maintaining etching progress, thereby resolving the contradiction between sidewall protection and etching uniformity
Solution Approach 2:
The patent applies preliminary action by pre-forming a mandrel structure and selectively removing portions before the main etching process. The mandrel provides a template that guides the subsequent etching, ensuring uniform sidewall formation while the selective removal allows controlled access to the tungsten layer. This preliminary structuring prevents random sidewall damage and ensures consistent etching profiles
2Productivity
If high aspect ratio features are etched, then device density is improved, but profile control and loading precision deteriorate
Solution Approach 1:
The patent applies local quality by implementing spatially selective etching and passivation. Different regions of the wafer receive different treatments based on their specific requirements - areas requiring sidewall protection receive dielectric deposition, while areas requiring etching progress receive etchant exposure. This localized control allows high aspect ratio features to be formed with precise profile control, resolving the contradiction between device density and manufacturing precision
Solution Approach 2:
The patent introduces a dielectric material as an intermediary between the etchant and the tungsten sidewalls. This intermediary layer selectively protects sidewalls during etching while allowing the etch to proceed vertically, enabling high aspect ratio feature formation with controlled profiles. The dielectric acts as a mediator that decouples the conflicting requirements of deep etching and sidewall preservation
3Length of moving object
If etching depth is increased, then feature functionality is improved, but sidewall damage increases
Solution Approach 1:
The patent uses periodic action by cycling between passivation deposition and etching removal. During passivation phases, dielectric material is deposited to protect sidewalls from damage. During etching phases, the tungsten is etched deeper while the protected sidewalls remain intact. This periodic protection mechanism enables increased etching depth without proportional increase in sidewall damage, resolving the contradiction between feature depth and sidewall integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient etching of high aspect ratio features with controlled depth and width, protecting sidewalls and allowing preferential deepening of features, thus improving the precision and throughput in semiconductor device fabrication.
Implementation Method 1
A halogenated silicon precursor is adsorbed to the sidewalls
Implementation Method 2
The silicon precursor adsorbed to the sidewalls is oxygenated
Data Source
AI summary
A method for etching a tungsten containing layer in an etch chamber is provided. A substrate is placed with a tungsten containing layer in the etch chamber. A plurality of cycles is provided. Each cycle comprises a passivation phase for forming a passivation layer on sidewalls and bottoms of features in the tungsten containing layer. Additionally, each cycle comprises an etch phase for etching features in the tungsten containing layer.