Tungsten Gate Formation via Seed Layer and Selective Liner Removal
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Solution Overview
Problem
Conventional replacement metal gate (RMG) processes using tungsten often result in physical damage and non-uniformities, leading to increased resistivity and operational issues in semiconductor devices.
Innovation Solution
A method involving the formation of a tungsten seed layer on a liner within a trench, followed by selective removal of the liner and seed layer portions to expose the work function metal layer, allowing for the growth of a second tungsten region with a single crystallographic orientation, which contacts the liner and trench sidewalls, thereby mitigating damage and non-uniformities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional CMP and RIE processes are used to remove portions of the tungsten gate, then the cap can be formed within the trench, but the tungsten gate is physically damaged and resistivity increases
Solution Approach 1:
A protective coating is applied to the tungsten gate before the CMP and RIE processes. This preliminary protective action prevents physical damage to the tungsten gate during subsequent manufacturing steps, allowing the cap to be formed without compromising gate integrity or increasing resistivity.
2Ease of manufacture
If conventional CMP and RIE processes are used to remove portions of the tungsten gate, then the cap can be formed within the trench, but non-uniformities are created across the semiconductor structure
Solution Approach 1:
The protective coating is applied uniformly across the tungsten gate surface before processing. This preliminary uniform protection ensures that when portions are removed during CMP and RIE, the remaining tungsten gate maintains uniformity across the semiconductor structure while still allowing cap formation.
3Reliability
If polysilicon gate is used, then high temperature processing is tolerated and self-aligned structures are formed, but gate speed is reduced due to high resistivity
Solution Approach 1:
The gate material is changed from polysilicon to tungsten, fundamentally changing the resistivity parameter. Tungsten has much lower resistivity than polysilicon, enabling faster gate operation speeds while the protective coating ensures the tungsten gate withstands the high temperature processing required for semiconductor manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces resistivity and corrects physical damage and non-conformities in tungsten regions, enhancing the performance and reliability of the RMG.
Implementation Method 1
forming a tungsten seed layer on the liner
Implementation Method 2
a tungsten region having a single crystallographic orientation, the tungsten region positioned on the liner
Data Source
AI summary
A structure and method for forming a tungsten region for a replacement metal gate (RMG). The method for forming the tungsten region may include, among other things, forming a first tungsten region i.e., tungsten seed layer, on a liner in a trench of a dielectric layer; removing a portion of the liner and the tungsten seed layer to expose an uppermost surface of a work function metal (WFM) layer wherein an uppermost surface of the liner and tungsten seed layer is positioned below an uppermost surface of the dielectric layer; and forming a second tungsten region from the tungsten seed layer. The tungsten region may be formed to contact the uppermost surface liner, the uppermost surface of WFM layer, and/or the sidewalls of the trench. The tungsten region may include a single crystallographic orientation. The tungsten region may also include an uppermost surface with a substantially arcuate cross-sectional geometry.