Tungsten Gate Metal Silicide Encapsulation for Oxidation Control
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Solution Overview
Problem
Conventional semiconductor devices with tungsten gates face issues of abnormal oxidation and stress-induced defects due to the permeation of oxygen through the interface between the tungsten layer and polysilicon layer, and stress from the nitride hard mask leading to voids and deteriorated gate characteristics.
Innovation Solution
A semiconductor device with a metal gate structure where a tungsten layer is enclosed with first and second tungsten silicide layers, and a tungsten nitride layer is used, along with a nitride hard mask, to prevent abnormal oxidation and stress-induced defects, employing a core type structure and a step-gated asymmetry recess structure to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a tungsten gate structure is formed with a tungsten layer directly on a polysilicon layer, then the gate resistance is reduced, but abnormal oxidation occurs at the side surface of the tungsten oxidation layer and oxygen permeation causes interface defects
Solution Approach 1:
A tungsten silicide layer is introduced as an intermediary layer between the tungsten layer and the polysilicon layer. This intermediate layer acts as a barrier to oxygen permeation, preventing oxygen from reaching the tungsten-polysilicon interface and causing defects, while also preventing abnormal oxidation at the side surfaces of the tungsten oxidation layer.
Solution Approach 2:
The gate structure uses a composite material approach by combining tungsten, tungsten silicide, and polysilicon layers. This multi-layer composite structure leverages the low resistivity of tungsten, the oxygen barrier properties of tungsten silicide, and the structural stability of polysilicon to achieve both low gate resistance and high reliability.
2Manufacturing precision
If a nitride layer is deposited on the tungsten layer for hard mask formation, then the gate pattern can be defined, but stress from the nitride layer causes leakage current and interface trap density increase
Solution Approach 1:
The tungsten silicide layer serves as a stress buffer between the nitride hard mask layer and the tungsten layer. It absorbs and distributes the stress generated during nitride layer deposition, preventing stress-induced leakage current and interface trap formation at the tungsten-gate insulation layer interface.
Solution Approach 2:
The tungsten silicide layer is deposited beforehand to provide a cushioning effect against the stress that will be introduced by the subsequent nitride layer. This pre-positioned buffer layer prevents harmful stress effects before they can occur during the hard mask formation process.
3Reliability
If the gate re-oxidation process is performed to recover etching damages, then the gate quality is improved, but abnormal oxidation occurs at the side surface of the tungsten oxidation layer
Solution Approach 1:
The tungsten silicide layer acts as a protective intermediary during the gate re-oxidation process. It prevents oxygen from reaching the side surfaces of the tungsten oxidation layer, thereby avoiding abnormal oxidation while still allowing the necessary re-oxidation to occur for recovering etching damages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents abnormal oxidation and interface instability, reduces stress-induced defects, and improves the overall characteristics of the tungsten gate, enabling the production of high-speed semiconductor devices with improved integration capabilities.
Implementation Method 1
since abnormal oxidation may be caused at a side surface of the tungsten oxidation layer
Implementation Method 2
it cannot prevent the occurrence of defects caused by permeation of oxygen through an interface between the tungsten layer and a polysilicon layer
Implementation Method 3
a stress induced leakage current and an interface trap density caused by the stress of the nitride layer for the hard mask are increasing
Data Source
AI summary
Disclosed are a semiconductor device with a metal gate and a method of manufacturing the same. The method of the present invention includes: preparing a semiconductor substrate having a isolation layer to define an active region; forming a gate insulation layer on the semiconductor substrate; sequentially forming a polysilicon layer, a first metal silicide layer, a metal nitride layer and a metal layer on the gate insulation layer including the isolation layer; etching the metal layer and the metal nitride layer so that the metal layer and the metal nitride layer have a narrower width than that of a desired gate; forming a second metal silicide layer on the first metal silicide layer including the etched metal nitride layer and the metal layer; forming a hard mask on the second metal silicide layer so that the hard mask has a desired gate width; and etching the second metal silicide layer, the first metal silicide layer, the polysilicon layer and the gate insulation layer by using the hard mask as an etching barrier, so as to form a metal gate with a structure in. which the metal nitride and the metal layer are enclosed with the first and second metal silicide layers.