Tungsten Interconnect Nitride Capping for Low-k Etch Damage

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Solution Overview

Problem

Current photolithography and etching processes for low-k ILD ICs often damage tungsten contacts due to etchant attacks, particularly during TiN metal hard mask removal, which complicates alignment registration and interconnect formation.

Innovation Solution

Forming a WNx layer on tungsten plugs using an in-situ plasma treatment with NH3 or N2 to cap the plugs, followed by depositing a protective etch-stop layer and using a transparent TiN hard mask for improved photolithographic registration and etching precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If TiN metal hard mask is used for etching, then etching precision is improved, but the hard mask becomes opaque making photolithographic registration difficult

Engineering Contradiction:
Improveetching precisionVSAvoidphotolithographic registration
Core Design Contradiction:
Manufacturing precisionVSIllumination intensity

Solution Approach 1:

The patent segments the hard mask into two distinct layers: a TiN layer for etching precision and a SiO2 layer for photolithographic transparency. This segmentation allows each layer to fulfill its specific function without compromising the other, resolving the contradiction between etching precision and registration visibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a composite hard mask structure combining TiN and SiO2 materials. The TiN provides the necessary etching precision while the SiO2 overlayer provides optical transparency for photolithographic registration, creating a composite solution that addresses both contradictory requirements.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional etchants are used for TiN hard mask removal, then hard mask removal is effective, but tungsten contacts are attacked and damaged

Engineering Contradiction:
Improvehard mask removalVSAvoidtungsten contact integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an intermediary protective layer (SiO2 or other dielectric material) deposited over the TiN hard mask and tungsten contacts. This intermediary layer acts as a barrier that prevents etchants from attacking the tungsten contacts during TiN removal, while still allowing effective hard mask removal to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective dielectric layer is deposited in advance before the TiN removal process, creating a preliminary protective barrier. This preliminary anti-action prevents the harmful effect of etchant attack on tungsten contacts before the removal process begins.

Inventive Principle:
Principle #9Preliminary anti-action

3Ease of operation

If resist cleans are used during multilevel metal layer patterning, then photoresist removal is effective, but tungsten and copper are etched and damaged

Engineering Contradiction:
Improvephotoresist removalVSAvoidmetal interconnect integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The protective dielectric layer serves as an intermediary barrier between the resist clean chemicals and the metal interconnects (tungsten and copper). This barrier allows effective photoresist removal while preventing the harmful etching of underlying metal layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective layer is deposited beforehand to cushion and protect the vulnerable metal interconnects from the harsh chemicals used in resist cleaning processes, preventing damage before it can occur.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The WNx layer protects tungsten plugs from etchant damage and allows for precise alignment and registration during multilevel photolithographic processing, maintaining interconnect integrity and enabling accurate dimensional scaling in deep lithographic interconnects.

Implementation Method 1

treating the semiconductor substrate with an in-situ plasma of a nitrogen containing gas wherein the plasma forms a nitride layer of the first metal

Methodology Applied
Scientific EffectPlasma: Plasma

Data Source

PatentUS7812455B2Interconnect in low-k interlayer dielectrics
Publication Date: 2010.10.12 TAHOE RES LTD
  • US7812455B2 patent drawing
  • US7812455B2 patent drawing
  • US7812455B2 patent drawing

AI summary

A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at least a first via to the semiconductor substrate; depositing the first metal on the semiconductor substrate to form at least a first metal contact plug in the first via in contact with the semiconductor substrate; treating the semiconductor substrate with an in-situ plasma of a nitrogen containing gas wherein the plasma forms a nitride layer of the first metal at least capping a top surface of the first metal plug in the first via; and forming a second metal contact to the metal nitride layer capping at least the top surface of the first metal plug.