Tungsten Plug Surface Topology Improvement
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Solution Overview
Problem
The deposition of tungsten in high-aspect-ratio holes within semiconductor devices often results in voids and recessed regions after chemical mechanical polishing (CMP), leading to degraded surface topology and poor electrical contact with overlying structures.
Innovation Solution
A method involving a first CMP procedure to create a planarized surface with recessed tungsten areas, followed by depositing a material into these recessed regions and a second CMP procedure to remove the material layer, thereby improving the surface topology and forming a phase change memory device with improved electrical contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tungsten is deposited in high-aspect-ratio holes by CVD to create plugs, then the holes are filled to create conductive structures, but voids and recessed regions are formed after CMP leading to degraded surface topology and poor electrical contact
Solution Approach 1:
A liner layer is deposited over the substrate before tungsten plug formation. This preliminary action creates a foundation that enables subsequent selective removal and material deposition steps to fill recessed regions, ultimately improving surface topology and electrical contact quality without altering the original plug structure
Solution Approach 2:
The liner layer is selectively removed from plug areas after tungsten deposition but before final planarization. This extraction allows the recessed regions to be accessed and filled with additional material in a controlled manner, addressing the void formation problem while maintaining plug integrity
Solution Approach 3:
The invention changes the physical and chemical parameters of the surface by depositing additional material into recessed regions and performing selective CMP. This parameter change transforms the degraded surface topology with voids into a planarized surface with improved electrical contact properties
2Ease of manufacture
If CMP is performed to planarize the surface after tungsten plug formation, then the surface is flattened for subsequent processing, but recessed regions are exposed creating poor electrical contact
Solution Approach 1:
Material is deposited into recessed regions before the final CMP step. This preliminary filling action ensures that when CMP is performed to achieve surface planarization, the recessed regions are already filled, preventing exposure of voids and maintaining electrical contact quality
Solution Approach 2:
The invention modifies the surface parameters by filling recessed regions with deposited material and then performing CMP. This changes the surface topology from degraded with exposed voids to planarized with maintained electrical contact, resolving the contradiction between planarization ease and contact reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively eliminates recessed regions, enhancing the surface topology and enabling reliable electrical contact and the creation of functional phase change memory devices with improved semiconductor device performance.
Implementation Method 1
The deposition of tungsten is typically by a chemical vapor deposition (CVD) process. As crystalline tungsten fills the hole from all sides, a narrow seam is typically created down the middle of the hole.
Implementation Method 2
The deposition of tungsten is typically by a chemical vapor deposition (CVD) process. As crystalline tungsten fills the hole from all sides, a narrow seam is typically created down the middle of the hole.
Implementation Method 3
A material is deposited onto the first planarized surface to create a material layer; the depositing step further comprising depositing the material into the upper portion of the recessed region.
Data Source
AI summary
The surface topology of a plug surface area-containing surface of a semiconductor device can be improved by removing material to create a first planarized surface with at least one plug surface area, typically a tungsten or copper plug area, comprising a recessed region. A material is deposited onto the first planarized surface, to create a material layer, and into the upper portion of the recessed region. The material layer is removed to create a second planarized surface with the material maintained in the upper portion of the recessed region. To form a semiconductor phase change memory device, a phase change element is formed between the at least one plug area, acting as a first electrode, at the second planarized surface and a second electrode.