Tunnel-Junction Light-Emitting Element p-Type Layer Profiling

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Solution Overview

Problem

Existing methods for manufacturing light-emitting elements face challenges in optimizing the p-type semiconductor layers to achieve improved electrostatic breakdown voltage characteristics and reduced forward voltage.

Innovation Solution

The method involves forming a first light-emitting part with a specific structure of p-type semiconductor layers, including a first layer formed at a first temperature without p-type impurities and a second layer formed at a higher temperature with a higher p-type impurity concentration. Similarly, the second light-emitting part is formed with layers having distinct p-type impurity concentrations and temperatures, optimizing the diffusion of p-type impurities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the p-type semiconductor layer is formed with high p-type impurity concentration to reduce forward voltage, then the forward voltage is reduced, but the electrostatic breakdown voltage characteristics deteriorate

Engineering Contradiction:
Improveforward voltageVSAvoidelectrostatic breakdown voltage characteristics
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The p-type semiconductor layer is divided into multiple layers with different p-type impurity concentrations. The first p-type semiconductor layer has a first p-type impurity concentration, and the second p-type semiconductor layer has a second p-type impurity concentration that is higher than the first. This segmentation allows the structure to achieve both low forward voltage (through the high concentration second layer) and good electrostatic breakdown voltage characteristics (through the lower concentration first layer).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the p-type semiconductor layer are assigned different impurity concentrations based on their functional requirements. The first p-type semiconductor layer region is optimized for electrostatic breakdown voltage characteristics with lower impurity concentration, while the second p-type semiconductor layer region is optimized for reducing forward voltage with higher impurity concentration. This local quality differentiation resolves the contradiction between the two opposing requirements.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the semiconductor layers are formed at high temperature to improve crystallinity, then the crystallinity is improved, but thermal stress increases

Engineering Contradiction:
ImprovecrystallinityVSAvoidthermal stress
Core Design Contradiction:
Manufacturing precisionVSStress or pressure

Solution Approach 1:

The formation temperature of the semiconductor layers is optimized to balance crystallinity and thermal stress. By carefully controlling the temperature parameter during layer formation, the process achieves sufficient crystallinity for device performance while keeping thermal stress within acceptable limits to prevent device failure. This parameter optimization resolves the contradiction between improving crystallinity and reducing thermal stress.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the electrostatic breakdown voltage characteristics and reduces the forward voltage of the light-emitting element, while also improving the crystallinity of the semiconductor layers and reducing thermal stress.

Implementation Method 1

forming the first layer with a first p-type impurity concentration at a first temperature, and forming the second layer with a second p-type impurity concentration on the first layer... The second p-type impurity concentration is greater than the first p-type impurity concentration. The second p-type semiconductor layer includes a third layer and a fourth layer... forming the third layer with a third p-type impurity concentration at a second temperature and forming the fourth layer with a fourth p-type impurity concentration on the third layer. The fourth p-type impurity concentration is greater than the third p-type impurity concentration. The second temperature is less than the first temperature.

Methodology Applied
Scientific EffectThermal diffusion: Diffusion

Data Source

PatentUS12288832B2Method for manufacturing light-emitting element
Publication Date: 2025.04.29 NICHIA CORP
  • US12288832B2 patent drawing
  • US12288832B2 patent drawing
  • US12288832B2 patent drawing

AI summary

A method for manufacturing a light-emitting element includes forming a first light-emitting part, forming a tunnel junction part on the first light-emitting part, and forming a second light-emitting part on the tunnel junction part. The step of forming the first light-emitting part includes forming a first layer with a first p-type impurity concentration at a first temperature, and forming a second layer with a second p-type impurity concentration on the first layer. The second p-type impurity concentration is greater than the first p-type impurity concentration. The step of forming the second light-emitting part includes forming a third layer with a third p-type impurity concentration at a second temperature and forming a fourth layer with a fourth p-type impurity concentration on the third layer. The fourth p-type impurity concentration is greater than the third p-type impurity concentration. The second temperature is less than the first temperature.