Tunnel Transistor Gate Layout for Lower-Voltage Current Switching
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Solution Overview
Problem
Tunnel transistors require large electrical potential differences between gate electrodes to control current, limiting their use in logical gates due to parallel electric field lines and band bending orthogonal to the gates.
Innovation Solution
Positioning the first and second gate electrodes substantially along the respective semiconductor parts allows for a gate-induced electric field with intersecting field lines, reducing the necessary voltage difference for controlling current between the source and drain, enabling lower voltage operation and improved switching states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the first and second gate electrodes are positioned along the second and first semiconductor parts respectively, then current control between drain and source is achieved, but large electrical potential differences are required between gate electrodes
Solution Approach 1:
The patent inverts the conventional positioning arrangement by placing the first gate electrode along the first semiconductor part and the second gate electrode along the second semiconductor part, rather than the conventional cross-positioning. This inversion changes the electric field orientation from being substantially parallel to the p-n junction to being substantially perpendicular, thereby reducing the required electrical potential difference between gates while maintaining effective current control capability
2Reliability
If gate electrodes are positioned to create electric field lines parallel to the p-n junction, then band bending is achieved, but the configuration limits use in logical gates due to orthogonal band bending from the p-n junction
Solution Approach 1:
The patent inverts the electric field orientation by repositioning the gate electrodes so that the gate-induced electric field lines are substantially perpendicular to the p-n junction rather than parallel. This inversion aligns the band bending direction with the gate control direction, eliminating the conflict with the p-n junction's orthogonal band bending and enabling effective use in logical gate applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for efficient switching between conducting and isolating states with lower voltage differences, reducing power consumption and increasing the density of logical gates and static random-access memory (SRAM) in a given space.
Implementation Method 1
the electric field lines of the electric field generated are substantially parallel to the p-n junction
Implementation Method 2
allowing a certain band bend, typically large electrical potential differences will be needed between the gate electrodes in order to deplete or create accumulation of carriers in the semiconductor region between the gates in order to create a band bending
Implementation Method 3
the p-n junction is creating a band bending orthogonal to the gates and this band bending has to be made negligible with respect to the gate-induced band bending
Implementation Method 4
The first and the second gate are provided to control current between a substantially conducting state and a substantially isolating state between the drain and the source by an electrical potential difference between the first and the second gate generating an electric field between the first and the second gate
Data Source
AI summary
A tunnel transistor is provided comprising a drain, a source and at least a first gate for controlling current between the drain and the source, wherein the first sides of respectively the first and the second gate dielectric material are positioned substantially along and substantially contact respectively the first and the second semiconductor part.