Tunneling Diode Memory Cell Refresh-Free Operation
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Solution Overview
Problem
Dynamic random access memories (DRAM) require periodic refresh to maintain their state, which is inconvenient and limits their scalability and efficiency compared to static random access memories (SRAM), which have higher bit-cell complexity and power consumption.
Innovation Solution
The use of semiconductor devices exhibiting negative differential resistance (NDR), such as tunneling diodes, to create memory structures that do not require periodic refresh, by integrating them with CMOS processing technology and combining with capacitor structures to enhance drive current and area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If dynamic random access memory (DRAM) is used to achieve high density and simple structure, then area efficiency is improved, but periodic refresh is required which increases power consumption and reduces reliability
Solution Approach 1:
The patent combines a tunnel diode exhibiting negative differential resistance with a capacitor to create a memory cell that merges the simplicity and density of DRAM with the refresh-free operation of static memory. The tunnel diode's NDR characteristic enables the cell to maintain state without periodic refresh, eliminating the power consumption issue while preserving the compact structure.
Solution Approach 2:
The patent changes the electrical parameters of the memory cell by introducing a tunnel diode with negative differential resistance characteristics. This parameter change enables the cell to operate without refresh cycles, transforming it from a volatile DRAM cell into a refresh-free memory cell that maintains data retention without continuous power input for refreshing.
2Ease of manufacture
If dynamic random access memory (DRAM) is used to achieve high density, then manufacturing simplicity is improved, but refresh operations are required which reduce productivity
Solution Approach 1:
The patent merges the simple 1T-1C DRAM structure with a tunnel diode component to create a hybrid memory cell that retains the ease of fabrication while eliminating the need for refresh operations. This combination allows the memory cell to be manufactured using standard CMOS processes while achieving refresh-free operation, thereby improving effective productivity.
3Reliability
If static random access memory (SRAM) is used to achieve refresh-free operation, then reliability is improved, but bit-cell complexity increases significantly
Solution Approach 1:
The patent extracts the refresh function from the memory cell operation by introducing a tunnel diode with negative differential resistance. This extraction eliminates the need for complex refresh control circuitry and operations, achieving refresh-free operation with a simpler structure than traditional SRAM.
Solution Approach 2:
The patent changes the electrical characteristics of the memory cell by incorporating a tunnel diode exhibiting negative differential resistance. This parameter change enables the cell to maintain stable states without refresh operations, achieving SRAM-like reliability with much lower structural complexity.
4Area of stationary object
If traditional capacitor structures are used in DRAM to achieve compactness, then area efficiency is improved, but scaling limits are reached
Solution Approach 1:
The patent combines the tunnel diode with the capacitor in a integrated 1T-1C structure where the tunnel diode provides the refresh-free functionality. This merging allows the capacitor to be optimized for area efficiency without the constraints of refresh operations, potentially enabling further scaling and improved manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a refresh-free memory structure with low power consumption and high area efficiency, comparable to SRAM in functionality but with the density and simplicity of DRAM, using resonant interband tunnel diodes (RITDs) to provide symmetric current-voltage relationships and enhanced drive capability.
Implementation Method 1
semiconductor devices exhibiting negative differential resistance (NDR), such as tunneling diodes
Implementation Method 2
resonant interband tunnel diodes (RITDs) to provide symmetric current-voltage relationships
Implementation Method 3
combining with capacitor structures to enhance drive current and area efficiency
Data Source
AI summary
A resonant inter-band tunnel diode (RITD) can be fabricated using semiconductor processing similar to that used for Complementary Metal-Oxide-Semiconductor (CMOS) device fabrication, such as can include using silicon. A memory cell (e.g., a random access memory (RAM) cell) can be fabricated to include one or more negative differential resistance device, such as tunneling diodes, such as to provide a single-bit or multi-bit cell. In an example, a “hybrid” memory cell can be fabricated, such as including one or more negative resistance devices, a MOS transistor structure, and a capacitor structure, such as including an integrated capacitor configuration similar to a generally-available dynamic RAM (DRAM) structure, but such as without requiring a refresh and offering a higher area efficiency.