Turbo-Code Block Segmentation for Controllable Decoding Latency

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Solution Overview

Problem

Channel coding techniques, such as turbo-codes and LDPC codes, face challenges in reducing decoding latency in wireless communication systems like WLAN and WPAN, which limits their use in packet-based transmission systems due to high latency and performance trade-offs.

Innovation Solution

A method of encoding and decoding data using blocks-oriented codes, where blocks are segmented into sub-blocks to match desired decoding latency, allowing for flexible block sizes and interleaving patterns to optimize decoding speed and throughput, enabling controlled latency and maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If block size is increased to improve throughput, then decoding latency increases

Engineering Contradiction:
ImprovethroughputVSAvoiddecoding latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides a large data block into multiple sub-blocks of smaller sizes. Each sub-block is decoded separately and in parallel, which reduces the decoding latency for each individual sub-block while maintaining the overall throughput by processing multiple sub-blocks simultaneously. This segmentation approach resolves the contradiction by allowing the system to handle large data volumes (high throughput) without suffering from the quadratic increase in decoding latency that would result from decoding a single large block.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If block size is reduced to decrease latency, then throughput decreases

Engineering Contradiction:
Improvedecoding latencyVSAvoidthroughput
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent employs parallel processing of multiple sub-blocks to ensure continuous decoding operation. While one sub-block is being decoded, other sub-blocks are being prepared or transmitted. This continuous pipeline operation maintains high throughput despite using smaller block sizes, as the decoder remains constantly utilized without idle periods. The parallel architecture allows multiple decoding operations to overlap in time, preserving productivity while benefiting from reduced latency per sub-block.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If iterative decoding is used to improve performance, then decoding latency increases

Engineering Contradiction:
Improvedecoding performanceVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a dynamic stopping criterion for the iterative decoding process. Instead of always performing a fixed number of iterations, the decoder monitors the convergence of the decoding algorithm and terminates early when sufficient reliability is achieved. This dynamic adaptation allows the system to maintain high decoding performance while significantly reducing latency in cases where full convergence is not necessary, thus resolving the contradiction between reliability and latency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7836376B2Method and apparatus for encoding blocks of data with a blocks oriented code and for decoding such blocks with a controllable latency decoding, in particular for a wireless communication system of the WLAN or WPAN type
Publication Date: 2010.11.16 STMICROELECTRONICS INT NV
  • US7836376B2 patent drawing
  • US7836376B2 patent drawing
  • US7836376B2 patent drawing

AI summary

To control a decoding latency, larger blocks are nonequally segmented into smaller ones. The decoding process starts directly after reception of the first small block. The latency is defined by the latency of the last small block decoding. Changing the number of iterations during the turbo-code decoding also permits control of the decoding latency.