Segmented Turbo Code Padding Layout for Lower Error and Shift Overhead
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing turbo coding methods face inefficiencies in data block segmentation and padding, leading to increased error rates and processing complexity, particularly due to the need for shifting large numbers of bits and the disadvantageous placement of padding bits, which affects power consumption and error rate performance.
Innovation Solution
A method that involves reordering and segmenting bit sequences to create empty positions at the beginning, allowing for padding to be performed efficiently, with smaller blocks located at the start and larger blocks at the end, minimizing the number of bits shifted and optimizing error rate performance by strategically placing padding bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If padding bits are filled at the end of data blocks, then the turbo coder can process blocks of minimum size, but non-constant data bits are generated during resetting or termination which cannot be utilized or increase receiver complexity
Solution Approach 1:
The patent inverts the conventional padding approach by filling padding bits at the beginning of data blocks instead of at the end. This inversion prevents the generation of non-constant data bits during turbo coder resetting or termination, as the padding bits are now positioned before the actual data bits, allowing for cleaner termination sequences and reduced receiver complexity.
2Reliability
If padding bits are filled at the beginning of data blocks, then data bit detection accuracy improves, but a large number of bits must be shifted to free space for padding, increasing power consumption and processing time
Solution Approach 1:
The patent applies segmentation by dividing the data transmission into multiple code blocks, where padding is applied selectively to only some blocks rather than all blocks. This reduces the total number of bits that need to be shifted and processed, thereby lowering power consumption while maintaining detection accuracy for the padded blocks.
Solution Approach 2:
The patent implements local quality by applying padding bits selectively to specific code blocks based on their position or characteristics, rather than uniformly padding all blocks. This localized approach optimizes the balance between detection accuracy and processing efficiency, as padding is applied only where necessary to maintain reliability.
3Productivity
If data blocks are segmented into multiple blocks, then the turbo coder can handle large bit sequences, but the set of admissible block sizes does not necessarily contain all integer multiples of minimum block size, requiring optimization to minimize zero padding
Solution Approach 1:
The patent changes the block size parameter by selecting from a specific set of admissible block sizes that are optimized for the turbo coder implementation. Rather than using all possible integer multiples of the minimum block size, the patent identifies and uses a subset of block sizes that minimize zero padding requirements while maintaining handling capability for large bit sequences.
4Ease of operation
If all blocks are made the same size, then processing is simplified, but larger blocks require more zero padding which increases overhead
Solution Approach 1:
The patent segments the data into multiple code blocks of potentially different sizes from the admissible set, rather than forcing all blocks to be the same size. This segmentation allows smaller blocks to be used where appropriate, reducing the amount of zero padding required and thereby decreasing overhead, while maintaining processing simplicity through systematic block management.
Data Source
AI summary
A method for forming a bit sequence having a number of M bits from a bit sequence having a number of N bits, wherein M/2<N<M, involves extending said bit sequence by M-N bit positions, segmenting said extended bit sequence into at least two blocks with different numbers of bit positions such that the number of bit positions in the first block is less than the number of bit positions in the last block, and filling empty bit positions with bits having a pre-determined value.