Turbo Coding Bit Interleaving for Reliable Low-Latency Radio Links

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Solution Overview

Problem

Existing radio communication systems face challenges in efficiently communicating between base station apparatuses and terminal apparatuses, particularly in scenarios requiring high-speed, large-capacity transmission, ultra-reliable, and low-latency communication, and massive machine-type communications.

Innovation Solution

Implementing turbo coding with a coding rate of 1/5 and using subblock interleavers to alternate bit sequences, along with parallel connections through turbo code internal interleavers in both base station and terminal apparatuses, to enhance communication efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If turbo coding with coding rate 1/5 and subblock interleaving is applied, then communication reliability is improved, but device complexity increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidcoding device complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The code bit sequences are divided into multiple subblocks through subblock interleaving, where each subblock is processed independently. This segmentation allows the system to achieve better error correction performance by distributing redundancy across multiple interleaved sequences, while maintaining manageable complexity through modular processing of each subblock separately.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic rate matching processes that adaptively select and combine code bit sequences from the turbo-coded output. The system dynamically adjusts which subblocks are transmitted and how they are combined at the receiver, enabling flexible adaptation to varying channel conditions while maintaining the structured complexity of the turbo coding framework.

Inventive Principle:
Principle #15Dynamics

2Productivity

If bit collection and alternating output of code bit sequences are implemented, then communication efficiency is improved, but processing time increases

Engineering Contradiction:
Improvecommunication efficiencyVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The subblock interleaving and bit collection processes are performed in advance during the encoding phase, organizing the code bit sequences into predetermined patterns. This preliminary structuring enables the receiver to efficiently process and combine the sequences without requiring complex real-time processing, thus improving communication efficiency while minimizing additional processing time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3484055B1Base station device, terminal device, communication method, and integrated circuit
Publication Date: 2026.03.18 SHARP KK
  • EP3484055B1 patent drawingFigure 1
  • EP3484055B1 patent drawingFigure 2A~2E
  • EP3484055B1 patent drawingFigure 3

AI summary

Channel encoding is provided that includes applying turbo coding with a coding rate of 1/5 to an input bit sequence, applying a subblock interleaver to each of first to fifth code bit sequences to which the turbo coding is applied, applying bit collection to the first to fifth code bit sequences output from the subblock interleaver, the bit collection outputting the first code bit sequence in order, outputting the second code bit sequence and the fourth code bit sequence alternately on a bit-by-bit basis after the first code bit sequence, and outputting the second code bit sequence and the fifth code bit sequence alternately on a bit-by-bit basis.