Parallel Turbo Decoder Memory Switching for LTE and WCDMA
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Solution Overview
Problem
Turbo decoders in modern wireless communication systems, particularly in LTE and LTE advanced standards, face high design complexity and power consumption, which hinders efficient data decoding and transmission.
Innovation Solution
A receiver and decoder architecture that enables parallel processing of Turbo decoding operations, utilizing a plurality of decoders with processors and memory units, and a data switch to adapt between LTE and WCDMA operations, facilitating efficient data processing and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single Turbo decoder is used, then device complexity is reduced, but processing speed and productivity are insufficient
Solution Approach 1:
The Turbo decoder is divided into multiple parallel decoding units (first Turbo decoder, second Turbo decoder, etc.), each processing different portions of the received signal simultaneously. This segmentation enables parallel processing to improve productivity while keeping each individual decoder unit relatively simple in structure
Solution Approach 2:
The system transitions from sequential single-decoder processing to parallel multi-decoder processing by adding a temporal/spatial dimension. Multiple decoders operate simultaneously on different data streams or signal portions, effectively increasing processing throughput without proportionally increasing overall system complexity
2Productivity
If multiple parallel decoders are used, then processing speed improves, but power consumption increases
Solution Approach 1:
The data switch is designed with multi-functionality to route signals dynamically between different decoder units based on operational requirements. This universal switching mechanism allows the system to activate only the necessary number of decoders for each processing task, optimizing power consumption while maintaining parallel processing capability when needed
Solution Approach 2:
The system employs dynamic configuration where the data switch adaptively connects different decoder units to different input sources based on real-time requirements. This dynamic reconfiguration enables the system to scale power consumption according to processing demands, activating multiple decoders only when parallel processing is required rather than maintaining all decoders in a constant active state
3Reliability
If dedicated hardware for each standard is used, then reliability is improved, but adaptability decreases
Solution Approach 1:
Multiple Turbo decoder units are designed with universal functionality to support both LTE and WCDMA standards. Each decoder unit can be configured to process different communication standards through the data switch, providing multi-standard support without requiring separate dedicated hardware for each standard, thus maintaining adaptability while ensuring reliable decoding through specialized processing units
4Productivity
If memory access is optimized for single decoder, then memory efficiency is improved, but processing delay increases in parallel mode
Solution Approach 1:
The memory system is segmented into multiple independent memory units (first memory, second memory, etc.), each dedicated to specific decoder units. This segmentation allows parallel memory access operations without contention, as each decoder can access its assigned memory simultaneously. The data switch efficiently routes data between these segmented memory units, minimizing access delays while maintaining high processing throughput
Data Source
AI summary
A receiver capable of decoding encoded transmissions. The receiver includes a number of receive antennas configured to receive data; a plurality of memory units that store the received data; and a plurality of decoders configured to perform a Turbo decoding operation. Each of the plurality of decoders decodes at least a portion of the received data using at least a portion of a decoding matrix. The receiver also includes a data switch coupled between the plurality of decoders and the plurality of memory units. The data switch configured to vary a decode operation from an long term evolution (LTE) based operation to a Wideband Code Division Multiple Access (WCDMA) operation.