Turbo Interleaver Size Selection for Contention-Free Decoding
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Solution Overview
Problem
Existing turbo coding systems face challenges in implementing contention-free interleavers for various information block sizes, leading to inefficiencies and potential memory access contentions during decoding, which affect the performance and scalability of turbo decoders.
Innovation Solution
A method and apparatus for selecting interleaver sizes for turbo codes, using a set of sizes defined by K″=ap×f, where a is an integer, f is a continuous integer, and p takes integer values, to determine a suitable interleaver size K′ that allows for contention-free interleaving and efficient decoding, with optional adjustments for specific memory lengths and tail-biting codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a turbo interleaver is designed to provide good weight distribution and error-correcting capabilities, then decoding performance is improved, but memory access contentions occur during parallel processing
Solution Approach 1:
The patent changes the fundamental parameter of interleaver design from traditional random or quadratic permutations to a number-theoretic approach based on modular arithmetic with carefully selected parameters (N, a, b, c) that satisfy specific mathematical conditions. This parameter transformation enables the interleaver to achieve both good weight distribution for error correction and contention-free properties for parallel processing efficiency.
Solution Approach 2:
The patent introduces a dynamic parameter selection mechanism where the interleaver parameters (N, a, b, c) are chosen based on the information block size and desired code rate. This dynamic adaptation allows the system to optimize between error-correcting capabilities and parallel processing efficiency for different operating conditions, resolving the contradiction across varying system requirements.
2Adaptability or versatility
If the interleaver size is increased to support larger information blocks, then adaptability is improved, but memory access contentions increase
Solution Approach 1:
The patent employs parameter changes by selecting interleaver size N as a specific function of the information block size K and code rate, where N satisfies mathematical conditions (N > K, N mod a = 0, etc.). This parameter transformation ensures that for any block size, the resulting interleaver maintains contention-free properties while adapting to the required capacity, thus improving adaptability without sacrificing memory access efficiency.
Solution Approach 2:
The patent creates a universal interleaver design that works across multiple information block sizes and code rates through a unified number-theoretic framework. The same mathematical conditions and selection rules apply regardless of the specific block size, providing a multi-functional solution that maintains both adaptability and memory access efficiency across diverse operating conditions.
3Device complexity
If traditional interleaver designs are used to simplify implementation, then device complexity is reduced, but contention-free properties are not guaranteed
Solution Approach 1:
The patent transforms the interleaver design from complex random or quadratic permutations to a simpler number-theoretic construction based on modular arithmetic operations. By changing the mathematical foundation and selecting parameters (N, a, b, c) that satisfy specific conditions, the implementation becomes more straightforward while guaranteeing contention-free properties through the mathematical structure rather than empirical design.
Solution Approach 2:
The patent enables the interleaver to self-configure for contention-free operation through automatic parameter selection based on the information block size and code rate. The mathematical conditions inherently ensure contention-free properties without requiring additional control logic or complex design decisions, allowing the system to self-optimize for both simplicity and reliability.
Data Source
AI summary
A method and apparatus for selecting interleaver sizes for turbo codes is provided herein. During operation information block of size K is received. An interleaver size K′ is determined that is related to K″, where K″ from a set of sizes; wherein the set of sizes comprise K″=ap×f, pmin≦p≦pmax;fmin≦f≦fmax, wherein a is an integer and f is a continuous integer between fmin and fmax, p takes integer values between pmin and pmax, a>1, pmax>pmin, pmin>1. The information block of size K is padded into an input block of size K′ using filler bits, if needed. Encoding is performed using the original input block and the interleaved input block to obtain a codeword block using a turbo encoder. The codeword block is transmitted through the channel.