Turbo Code List Decoding with Segmented Trellis and CRC Pruning
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Solution Overview
Problem
Conventional turbo decoders face challenges in low complexity list decoding of turbo codes and convolutional codes, particularly in segmented or windowed trellis representations, leading to inconsistent path metrics and increased sorting complexity, which affects the identification of most likely codewords and increases latency.
Innovation Solution
The proposed method, known as Approximate Maximum-Log List Algorithm (AMLLA), decodes signals by identifying the least reliable bits and generating candidate codewords based on partial path metrics, reducing the need for global list sorting and comparisons across all trellis stages, and uses a segmented trellis representation to process path metrics effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional Maximum-Log List (MLL) decoding is applied to segmented trellis representations, then parallel decoding can be implemented to increase productivity, but path metrics become inconsistent across segments leading to incorrect candidate codeword identification
Solution Approach 1:
The patent applies segmentation by dividing the trellis into multiple independent segments that can be decoded in parallel. Each segment maintains its own path metric calculations without requiring global consistency across the entire trellis, enabling parallel processing while avoiding the inconsistency problem of conventional MLL decoding on segmented trellises.
Solution Approach 2:
The patent implements local quality by allowing each segment to have its own local path metric references and candidate path selections. Instead of requiring global path metric consistency across all segments, each segment independently identifies its most likely paths based on local metrics, which resolves the contradiction between parallel processing and metric consistency.
2Reliability
If conventional MLL decoding ranks all path metrics at each trellis stage to maintain a list of L candidate paths, then decoding accuracy is improved, but sorting complexity increases significantly
Solution Approach 1:
The patent extracts only the necessary path metric information needed for accurate decoding without performing complete sorting of all paths at each stage. It identifies and retains only the most relevant candidate paths by extracting key metric comparisons, thereby maintaining decoding accuracy while significantly reducing sorting complexity.
Solution Approach 2:
The patent applies partial action by performing limited path metric comparisons rather than exhaustive sorting of all paths. It identifies the L best paths through selective comparison operations that are sufficient for accurate decoding but require far fewer computational resources than complete sorting would demand.
3Reliability
If the list size L is increased to improve decoding reliability by considering more candidate codewords, then error probability decreases, but computational complexity and latency increase
Solution Approach 1:
The patent performs preliminary identification of candidate paths during the decoding process itself, rather than requiring post-decoding sorting and selection. By maintaining an updated list of candidate paths throughout the trellis traversal, it prepares the candidate codeword list in advance, reducing the need for extensive post-processing even when L is large.
Solution Approach 2:
The patent implements skipping by using early termination criteria that allow the decoding process to proceed efficiently even with larger list sizes. When sufficient candidate paths are identified or when metric thresholds are met, the algorithm can skip unnecessary additional sorting or evaluation steps, thereby maintaining low latency despite increased reliability through larger L.
Data Source
AI summary
Method for decoding signal includes receiving signal, where signal includes at least one symbol; decoding signal in stages, where each at least one symbol of signal is decoded into at least one bit per stage, wherein Log-Likelihood Ratio (LLR) for each at least one bit at each stage is determined, and identified in vector LAPP; performing Cyclic Redundancy Check (CRC) on LAPP, and stopping if LAPP passes CRC; otherwise, determining magnitudes of LLRs in LAPP; identifying K LLRs in LAPP with smallest magnitudes and indexing K LLRs as r={r(1), r(2), . . . , r(K)}; setting Lmax to maximum magnitude of LLRs in LAPP or maximum possible LLR quantization value; setting v=1; generating {tilde over (L)}A(r(k))=LA(r(k))−Lmaxvksign[LAPP(r(k))], for k=1, 2, . . . , K; decoding with {tilde over (L)}A to identify {tilde over (L)}APP, wherein {tilde over (L)}APP is LLR vector; and performing CRC on {tilde over (L)}APP, and stopping if {tilde over (L)}APP passes CRC or v=2K-1; otherwise, incrementing v and returning to generating {tilde over (L)}A(r(k)).