Turbo Mode Logic for Multi-Core Microprocessor Performance
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Solution Overview
Problem
In multi-core microprocessors, thermal throttling mechanisms are not effective in low-ambient temperature environments, leading to potential over-design of power delivery systems due to the lack of mechanisms to reduce operating frequency and voltage, causing excessive power consumption.
Innovation Solution
Implementing turbo mode logic that enables a core to operate at higher frequencies and voltages by utilizing the power and thermal headroom of idle cores, with a hysteresis mechanism to limit the duration of dual-core activity and prevent excessive thermal design power exceedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If thermal throttling is implemented to reduce power consumption when temperature exceeds threshold, then power consumption is controlled, but in low-ambient temperature environments the mechanism fails to activate and power consumption becomes excessive
Solution Approach 1:
The patent implements a feedback mechanism by monitoring core activity states and dynamically adjusting turbo mode operation. The hysteresis mechanism provides feedback control by tracking the duration of dual-core activity and disabling turbo mode when a threshold is exceeded, thereby controlling power consumption based on actual system state rather than ambient temperature alone.
2Productivity
If cores operate at higher frequencies and voltages to maximize performance, then single core performance is improved, but power and thermal design power limits are exceeded
Solution Approach 1:
The patent applies dynamics by making the turbo mode operational state dependent on real-time core activity conditions. The hysteresis mechanism dynamically adjusts the operational parameters by enabling turbo mode when only one core is active and disabling it when dual-core activity persists beyond a threshold duration, allowing performance optimization while preventing thermal design power exceedance.
Solution Approach 2:
The patent changes the operational parameters (frequency and voltage) of processor cores conditionally based on core activity state. By monitoring whether cores are idle or active and adjusting turbo mode accordingly, the system varies operating parameters to achieve high performance when possible while maintaining power within limits when multiple cores are active.
3Productivity
If power delivery system is over-designed to supply additional power for indefinite high-frequency operation, then performance is maintained, but system cost and complexity increase
Solution Approach 1:
The patent implements self-service by enabling the processor system to self-regulate its power consumption through the hysteresis mechanism. The system automatically monitors core activity and disables turbo mode when appropriate, eliminating the need for external thermal management intervention and reducing the requirement for over-designed power delivery infrastructure.
Data Source
AI summary
A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.


