Packet Switch TurboPath Bypasses Descriptor Queue
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Solution Overview
Problem
High-latency issues in packet switching devices due to header processing, forwarding computations, and packet queuing in high-speed switches, which current solutions like caching and port replication attempt to address but at the cost of flexibility and efficiency.
Innovation Solution
The implementation of a 'TurboPath' (TP) mechanism that allows certain packets to bypass the descriptor queue by identifying eligible packets based on predefined criteria and forwarding them immediately through a dedicated path, maintaining flexibility and reducing latency by operating in parallel with normal packet switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If packets are forwarded through the normal descriptor queue processing path, then forwarding flexibility and control are maintained, but latency increases due to header processing, forwarding computations, and packet queuing
Solution Approach 1:
The patent segments the packet forwarding path into two distinct channels: a normal descriptor queue path for regular packets and a TurboPath for low-latency packets. This segmentation allows different packets to be handled by different paths based on their requirements, reducing overall latency for time-sensitive traffic while maintaining normal processing for other packets.
Solution Approach 2:
The patent extracts the latency-critical forwarding operations from the normal descriptor queue processing path and creates a separate TurboPath. By taking out the header processing, forwarding computations, and queuing steps that cause latency, the system can forward selected packets with minimal delay while keeping the main processing path intact for flexibility.
2Loss of time
If cache memories are used at ports to store forwarding databases, then lookup time is reduced and latency decreases, but device complexity and memory requirements increase
Solution Approach 1:
The patent implements preliminary action by pre-computing forwarding decisions for packets that meet specific criteria and placing them directly into the TurboPath. This avoids the need for real-time lookup in cache memories or forwarding databases, as the forwarding destination is determined in advance when the packet is identified for TurboPath processing.
3Loss of time
If traffic is replicated to multiple egress ports simultaneously (Warp SPAN), then low latency is achieved for replicated traffic, but processing flexibility and resource utilization are reduced
Solution Approach 1:
The patent implements a dynamic packet forwarding system where the forwarding path (normal queue vs. TurboPath) is determined based on real-time packet characteristics and network conditions. The switching logic can dynamically select which path to use for each packet, providing adaptability and versatility while achieving low latency when appropriate.
Solution Approach 2:
The patent applies local quality by providing different processing treatments to different packets based on their specific requirements. Packets meeting predefined criteria receive the accelerated TurboPath treatment, while other packets continue through the normal processing path, allowing each packet to receive the appropriate level of service based on its local characteristics.
Data Source
AI summary
A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.