Turbo Write Blocks and Normal Memory Blocks for Storage Speed

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Solution Overview

Problem

Current storage devices face limitations in write response speed, as existing memory technologies do not efficiently manage data storage across different types of memory blocks, leading to suboptimal performance in data write operations.

Innovation Solution

The implementation of a memory controller that manages a combination of turbo write blocks and normal memory blocks, allowing for the determination of whether data is stored in turbo write blocks or normal memory blocks based on specific mode information, enabling faster write operations by utilizing blocks programmed to store different numbers of data bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is stored in normal memory blocks, then storage capacity is maximized, but write response speed is reduced

Engineering Contradiction:
Improvestorage capacityVSAvoidwrite response speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory device is segmented into two distinct types of memory blocks: normal memory blocks optimized for storage capacity and turbo write blocks optimized for write speed. This segmentation allows the system to simultaneously maintain high storage capacity while providing fast write paths for performance-critical operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the memory device are assigned different qualities/functions: normal memory blocks use memory cells programmed to store multiple data bits (higher density) while turbo write blocks use memory cells programmed to store fewer data bits (faster write speed). This local differentiation resolves the contradiction by allowing both high capacity and high speed in appropriate locations.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If memory cells are programmed to store more data bits, then storage density is improved, but write operation time increases

Engineering Contradiction:
Improvestorage densityVSAvoidwrite operation time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent changes the programming parameters of memory cells based on their intended use. Turbo write blocks use memory cells programmed with parameters optimized for speed (storing fewer bits), while normal memory blocks use memory cells programmed with parameters optimized for density (storing more bits). This parameter differentiation resolves the contradiction between storage density and write operation time.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a single type of memory block is used, then device complexity is reduced, but write performance is suboptimal

Engineering Contradiction:
Improvememory block configurationVSAvoidwrite performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory controller dynamically selects between normal memory blocks and turbo write blocks based on the specific write operation requirements. This dynamic allocation allows the system to optimize write performance for different workloads while maintaining a manageable device architecture through centralized control logic.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11360886B2Storage device and operating method thereof
Publication Date: 2022.06.14 SK HYNIX INC
  • US11360886B2 patent drawing
  • US11360886B2 patent drawing
  • US11360886B2 patent drawing

AI summary

A storage device having an improved write response speed includes a memory device and a memory controller. The memory device including a plurality of turbo write blocks and a plurality of normal memory blocks and a memory controller configured to control the memory device to store data corresponding to a write request received from a host in any one block among the plurality of turbo write blocks and the plurality of normal memory blocks, in response to the write request, wherein the plurality of turbo write blocks respectively include memory cells being programmed to store different numbers of data bits.