Turbo Write Buffer Segmentation for UFS Storage Performance

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Solution Overview

Problem

Current semiconductor memory devices, particularly flash memory devices, face challenges in optimizing storage performance due to limitations in write speed and data management across different memory areas, leading to inefficiencies in data storage and retrieval.

Innovation Solution

A storage device with a nonvolatile memory system comprising multiple areas (first, second, and third areas) and a controller that dynamically manages data storage based on area information, utilizing a turbo write buffer for high-speed operations and user storage for normal operations, enabling flexible data allocation and improved write performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is stored in the turbo write buffer for high-speed operations, then write performance is improved, but device complexity increases due to multiple memory areas and dynamic management

Engineering Contradiction:
Improvewrite performanceVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The nonvolatile memory device is divided into multiple distinct areas (first area with first memory cells, second area with second memory cells, third area with third memory cells) where each area has different memory cell configurations optimized for specific functions. This segmentation allows the system to achieve high write performance in the turbo write buffer while maintaining data integrity and capacity in other areas, resolving the contradiction between improved productivity and increased device complexity by organizing complexity into functional segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller dynamically manages data allocation and movement between different memory areas based on operational requirements. Data can be temporarily stored in the turbo write buffer area for high-speed operations and then moved to other areas when needed. This dynamic management allows the system to optimize write performance when required while maintaining simplicity in data access patterns during normal operations, effectively balancing productivity improvement with device complexity management.

Inventive Principle:
Principle #15Dynamics

2Productivity

If multiple memory areas with different cell configurations are used, then storage efficiency is optimized, but ease of operation decreases due to area information management requirements

Engineering Contradiction:
Improvestorage efficiencyVSAvoidease of operation
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The controller is designed with multi-functionality to handle various operations across different memory areas. It can automatically determine which area to use based on data requirements, manage area information internally, and present a unified interface to external systems. This universal controller design allows the system to achieve optimized storage efficiency through multiple memory areas while maintaining ease of operation by abstracting the complexity of area management from the user.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If the turbo write buffer is used for high-speed data storage, then write speed is improved, but loss of information increases if data is not properly flushed to user storage

Engineering Contradiction:
Improvewrite speedVSAvoiddata loss risk
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The system performs preliminary actions by maintaining data in the turbo write buffer area with appropriate area information before finalizing storage operations. The controller ensures that data is properly prepared and tracked with area information that identifies its location and status. This preliminary organization allows the system to achieve high write speeds while preventing information loss through proper data tracking and management protocols that ensure data is correctly transferred to user storage when needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller implements feedback mechanisms to monitor the status of data in the turbo write buffer and manage flushing operations to user storage. By tracking area information and data locations, the system receives feedback about the current state of stored data and can take appropriate actions to prevent data loss, such as ensuring proper flushing or maintaining redundant copies. This feedback system allows the turbo write buffer to operate at high speeds while maintaining data integrity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11899980B2Storage device including a turbo write buffer divided into a non-pinned buffer area and a pinned buffer area, an operation method of a storage system including the storage device in which data of the non-pinned and pinned buffer areas are flushed differently, and a host device controlling the storage device
Publication Date: 2024.02.13 SAMSUNG ELECTRONICS CO LTD
  • US11899980B2 patent drawing
  • US11899980B2 patent drawing
  • US11899980B2 patent drawing

AI summary

An operation method of a UFS device including: determining, by a host, area information for write data, wherein in a turbo read the write data is stored in a non-pinned or pinned buffer area and in a normal read the write data is stored in a user storage; transferring, by the host, a first command UFS protocol information unit (UPIU); transferring, by the UFS device, an RTT UPIU to the host, transferring, by the host, a DATA OUT UPIU to the UFS device; mapping, by UFS device, a first logical block address with a physical address of an area corresponding to the area information; transferring, by the host, a second command UPIU; and performing the turbo read on the area to read data corresponding to the first logical block address when the area corresponding to the area information is the pinned or non-pinned turbo write buffer.