Integrated Turn-Off Slew Rate Control for EMI-Limited Transistors
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Solution Overview
Problem
III-V semiconductor transistors, such as GaN-based HEMTs and MISHEMTs, exhibit fast switching rates that lead to ringing and higher order harmonics, resulting in electromagnetic interference that requires expensive filtering components to mitigate.
Innovation Solution
A circuit structure incorporating an enhancement mode transistor with an integrated turn-off slew rate controller, which automatically adds drain-source capacitance when the transistor is switching off, effectively slowing the turn-off slew rate without increasing turn-off energy loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor switching rate is increased to improve productivity, then the switching speed is improved, but electromagnetic interference increases causing harmful effects
Solution Approach 1:
The slew rate controller is configured to detect the transition of the transistor from on-state to off-state and respond by adding capacitance to the drain node. This preliminary detection and response mechanism activates the capacitance addition just before the rapid voltage transition occurs, effectively controlling the slew rate at the critical moment when electromagnetic interference would otherwise be generated.
Solution Approach 2:
The circuit dynamically adjusts the drain node capacitance based on the transistor's switching state. During normal operation, the capacitance remains at its baseline value, allowing fast switching. When the transistor begins to turn off, the slew rate controller detects this transition and adds additional capacitance to the drain node, dynamically modifying the circuit's electrical characteristics to control the rate of voltage change and reduce electromagnetic interference.
2Object-generated harmful factors
If filtering components are added to reduce electromagnetic interference, then harmful effects are minimized, but device complexity and cost increase
Solution Approach 1:
Instead of using external filtering components to remove electromagnetic interference after it is generated, the invention converts the potential harm into a benefit by proactively controlling the slew rate. The capacitance addition mechanism transforms what would be a harmful rapid voltage transition into a controlled, slower transition, eliminating the need for filtering components while actually preventing the generation of electromagnetic interference in the first place.
3Object-generated harmful factors
If capacitance is added to slow the slew rate, then electromagnetic interference is reduced, but turn-off energy loss increases
Solution Approach 1:
The capacitance is added preliminarily, just as the transistor begins to turn off, rather than being continuously present. This timing ensures that the additional capacitance only affects the slew rate during the critical transition period when electromagnetic interference would otherwise occur, while minimizing its impact on the overall turn-off energy loss by not being present during the entire off-state.
Solution Approach 2:
The capacitance value at the drain node is dynamically adjusted based on the transistor's switching state. During the turn-off transition, additional capacitance is added to control the slew rate and reduce electromagnetic interference. During steady-state operation, the capacitance returns to its baseline value, minimizing energy loss. This dynamic adjustment allows the system to achieve electromagnetic interference reduction only when needed, without the continuous energy penalty of having large capacitance present at all times.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes electromagnetic interference by slowing the turn-off slew rate, thereby reducing the need for expensive filtering components and maintaining low turn-off energy loss.
Implementation Method 1
The slew rate controller increases drain-source capacitance of the transistor to slow the slew rate whenever the drain voltage at the drain region rises at least to a predetermined positive drain voltage level and the slew rate is positive
Data Source
AI summary
A circuit structure includes an enhancement mode transistor and a turn-off slew rate controller for automatically adding drain-source capacitance to the transistor when the transistor is transitioning to an off state. The added drain-source capacitance slows the turn-off slew rate (dV/dt_off) of the transistor without also increasing the turn-off energy loss (E_off). The slew rate controller can include: sensors connected to the drain region for sensing both the drain voltage and the slew rate, respectively; a logic circuit for generating and outputting an enable signal based on output voltages from the sensors; and a capacitance adder for adding to the drain-source capacitance only when the logic value of the enable signal indicates that the drain voltage is at or above a predetermined positive drain voltage level and the slew rate is positive.