TV Multimedia I/O Architecture With Shared Channels and Fewer Pins

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Solution Overview

Problem

Advanced digital television systems face high manufacturing costs and engineering complexities due to the increasing pin count required for connecting discrete I/O chips, which is exacerbated by the need for deeper sub-micron processes and process migration of I/O interface circuits.

Innovation Solution

A multimedia I/O system architecture that integrates all I/O interface circuits within a single I/O controller chip, using shared high-performance channels for communication with the processing core chip, and includes audio/video sub-processing engines to reduce data traffic and offload processing burdens from the core chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If discrete I/O chips are used to avoid process migration, then I/O interface circuits can be maintained without redesign, but pin count increases and manufacturing costs rise

Engineering Contradiction:

ImproveI/O interface circuit maintenanceVSAvoidpin count

Core Design Contradiction:

Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent merges discrete I/O chips with the processing core chip into a single integrated device. The I/O interface circuits are integrated within the processing core chip, eliminating the need for separate discrete I/O chips and reducing the overall pin count while maintaining the ability to update I/O interfaces through process migration.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The processing core chip is designed to perform multiple functions, including both processing core operations and I/O interface circuit operations. This multi-functional integration allows the same chip to handle various I/O interfaces (Ethernet, USB, HDMI, DVI, analog ports) without requiring separate dedicated chips for each interface type.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Quantity of substance

If I/O interface circuits are integrated within processing core chip, then pin count is minimized, but manufacturing costs increase due to process migration requirements

Engineering Contradiction:

Improvepin countVSAvoidmanufacturing cost

Core Design Contradiction:

Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent changes the manufacturing process parameters by adopting deeper sub-micron processes (such as 65nm or 40nm CMOS) that enable higher density integration of I/O interface circuits within the processing core chip. This allows more functionality to be packed into the same die size, reducing the need for multiple separate chips and their associated interconnect pins.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If deeper sub-micron processes are used to integrate more logic, then processing capacity increases, but engineering costs increase due to process migration

Engineering Contradiction:

Improveprocessing capacityVSAvoidengineering cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent combines processing core circuits and I/O interface circuits into a single integrated device manufactured using the same deeper sub-micron process. This unified approach ensures that when process migration is needed, both processing and I/O components are updated together, eliminating the need for separate process migration efforts and reducing engineering costs.

Inventive Principle:

Principle #5Merging (Combining)

4Adaptability or versatility

If multiple discrete I/O chips are used, then various I/O interfaces are supported, but data traffic bottlenecks occur due to communication overhead

Engineering Contradiction:

ImproveI/O interface supportVSAvoiddata transfer speed

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent merges multiple I/O interface circuits into a single integrated device with the processing core, eliminating the need for external communication channels between separate chips. This internal integration allows direct data transfer between I/O interfaces and the processing core without external pin bottlenecks, significantly improving data transfer speed while supporting multiple I/O interface types.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20120147271A1Multimedia I/O system architecture for advanced digital television

Publication Date: 2012.06.14 LATTICE SEMICON CORP

AI summary

Embodiments of the invention are generally directed to a multimedia I/O system architecture for advanced digital television. An embodiment of a multimedia system includes an I/O (input/output) control chip, the I/O control chip including one or more audio/video sub-processing engines for the processing of one or more data streams; a processing core chip for the processing of data, including audio/video data received from the I/O control chip; and one or more shared I/O channels for the transfer of data between the I/O control chip and the processing core chip.