Transient Voltage Suppressor Layout With Adjustable Trigger and Holding
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Solution Overview
Problem
Conventional transient voltage suppressors face challenges with high circuit complexity, increased device fabrication costs, and limited adjustability of breakdown voltages and gain performance, due to complex epitaxial layer structures and snapback effects in existing designs.
Innovation Solution
A novel transient voltage suppressor circuit design featuring a heavily doped substrate, lightly doped epitaxial layers, and well regions with adjustable trigger and holding voltages, utilizing a floating-base bipolar junction transistor and silicon controlled rectifier structures, allowing for reduced circuit complexity and adjustable breakdown voltages through ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional ESD protection diode structures are used, then fast response to overvoltage is achieved, but holding voltage is low and snapback effects occur
Solution Approach 1:
The patent changes the electrical parameters of the semiconductor structure by introducing a lightly doped epitaxial layer with controlled impurity concentration between the heavily doped substrate and well regions. This parameter modification enables adjustable trigger and holding voltages while eliminating the snapback effect, maintaining fast response characteristics.
2Use of energy by moving object
If MOV-based TVS structures are used, then energy absorption capability is improved, but device area and fabrication complexity increase significantly
Solution Approach 1:
The patent merges the protective functions into a simplified semiconductor structure that integrates the heavily doped substrate, lightly doped epitaxial layer, and well regions into a single compact device. This unified structure achieves effective surge current protection without requiring complex multi-layer epitaxial stacks or separate MOV components, reducing both device area and fabrication complexity.
3Manufacturing precision
If multiple epitaxial layers are used in transient voltage suppressor, then breakdown voltage control is improved, but device fabrication cost and design area increase
Solution Approach 1:
The patent applies local quality by creating a specific lightly doped epitaxial layer region with controlled impurity concentration in a localized area between the heavily doped substrate and well regions. This localized doped layer provides precise breakdown voltage control and adjustable trigger/holding voltages without requiring extensive multi-layer epitaxial structures, thereby reducing overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves reduced circuit complexity, adjustable trigger and holding voltages, and improved electrical performance by eliminating snapback effects and allowing for a wide range of breakdown voltages, making it more efficient and flexible compared to prior arts.
Implementation Method 1
when a sweeping voltage is injected from its positive terminal, a bipolar junction transistor (BJT) having a floating base is formed
Implementation Method 2
adjustable trigger and holding voltages, utilizing a heavily doped substrate, lightly doped epitaxial layer, and well regions, along with trenches for electrical isolation, forms a bipolar junction transistor and silicon controlled rectifier with floating bases, allowing for adjustable breakdown voltages and eliminating snapback effects through ion implantation
Implementation Method 3
when a sweeping voltage is injected from its negative terminal, a silicon controlled rectifier (SCR) having a floating base is correspondingly formed
Implementation Method 4
eliminating snapback effects through ion implantation
Data Source
AI summary
A transient voltage suppressor with adjustable trigger and holding voltages is provided, including a heavily doped substrate of a first conductivity type connected to a first node, a lightly doped epitaxial layer of a second conductivity type on the substrate, a first and third well region of the first conductivity type, a second well region of the second conductivity type, a first and third heavily doped region of the second conductivity type and a second heavily doped region of the first conductivity type. The heavily doped regions are commonly electrically connected to a second node, and individually disposed in the well regions. Trenches are disposed opposite in the substrate for electrical isolation. A floating base bipolar junction transistor and silicon controlled rectifier can be respectively formed under a positive and negative surged mode. Accordingly, the invention is advantageous of superior electrical performances, high layout flexibility and low area consumption.