TVS Circuit Diode Buried Layer Parasitic Capacitance

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Solution Overview

Problem

Existing transient voltage suppressor (TVS) circuits face limitations in sustaining high forward currents due to high parasitic capacitance, which restricts the application range of protected circuits.

Innovation Solution

A TVS circuit design featuring a diode device with a buried layer of higher impurity concentration, formed in a conductive type substrate, coupled in reverse series with a suppressor device, allowing for higher transient capacitance and current handling without increasing normal operation capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a large area PN junction is used in the suppressor device to release high current in very short time, then the current handling capability is improved, but the parasitic capacitance increases significantly

Engineering Contradiction:
Improvecurrent handling capabilityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The suppressor device is segmented into multiple small-area PN junctions distributed across the substrate, with each junction handling a portion of the transient current. This segmentation reduces the parasitic capacitance of each individual junction while collectively maintaining high current handling capability through parallel operation of multiple junctions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a buried layer with higher impurity concentration specifically in regions where PN junctions are formed, creating local variations in electrical properties. This local quality enhancement increases the breakdown voltage and reduces parasitic capacitance in critical areas without compromising overall current handling capability.

Inventive Principle:
Principle #3Local quality

2Speed

If a diode device with lower parasitic capacitance is inserted between the protected circuit and suppressor device, then the operation speed is improved, but the current sustaining capability is reduced

Engineering Contradiction:
Improveoperation speedVSAvoidcurrent sustaining capability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent modifies the impurity concentration parameter by introducing a buried layer with higher doping concentration beneath the PN junctions. This parameter change reduces the junction capacitance (improving operation speed) while the buried layer provides additional current paths that maintain high current sustaining capability during transient events.

Inventive Principle:
Principle #35Parameter changes

3Speed

If the TVS circuit is designed with lower capacitance to increase operation speed, then the speed is improved, but the maximum sustainable current is reduced

Engineering Contradiction:
Improveoperation speedVSAvoidmaximum sustainable current
Core Design Contradiction:
SpeedVSPower

Solution Approach 1:

The patent adds a vertical dimension to the current path by introducing a buried layer at a deeper level in the substrate. This dimensional addition creates three-dimensional current distribution, allowing the circuit to sustain higher currents through multiple spatial paths while maintaining low junction capacitance for fast operation speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TVS circuit can sustain higher transient currents and voltages, enhancing protection against electrostatic discharges while maintaining comparable operation speed in normal conditions, thus broadening the application range of protected circuits.

Implementation Method 1

a buried layer, which is formed in the substrate below the well, wherein the buried layer has a same conductive type with the well, and its impurity concentration is higher than that of the well

Methodology Applied
Scientific EffectImpurity concentration effect:

Data Source

PatentUS9018070B2Transient voltage suppressor circuit, and diode device therefor and manufacturing method thereof
Publication Date: 2015.04.28 RICHTEK TECH
  • US9018070B2 patent drawing
  • US9018070B2 patent drawing
  • US9018070B2 patent drawing

AI summary

The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.