TSV Electrical Testing via Reduced PN Junction Area
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Solution Overview
Problem
The existing system for electrical testing of through-silicon vias (TSVs) is hindered by the reverse saturation current of the PN junction, which can mask leakage currents and prevent the detection of defects, due to its inherent reverse saturation current comparable to potential leakage currents.
Innovation Solution
The area of the PN junction traversed by the testing current is reduced by creating a vertical projection of the conductive region within the insulating region, minimizing the junction area and thus reducing the reverse saturation current, and optionally using a redundant configuration of microelectronic buried structures for reliable testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PN junction is used for electrical testing of through vias, then electrical testing capability is enabled, but reverse saturation current masks leakage currents and prevents defect detection
Solution Approach 1:
The patent applies local quality by creating a vertical projection of the conductive region within the insulating region at the bottom of the via. This localized structural modification reduces the PN junction area specifically at the critical interface region, thereby reducing reverse saturation current where it most affects defect detection, while maintaining the overall functionality of the via structure.
Solution Approach 2:
The patent changes the physical parameter of the PN junction area by introducing a vertical projection that reduces the junction area. This parameter change directly reduces the reverse saturation current magnitude, enabling the testing system to detect leakage currents that would otherwise be masked by the higher reverse saturation current of a conventional via structure.
2Measurement precision
If conventional via structures are used, then manufacturing is simpler, but leakage current detection is masked by reverse saturation current
Solution Approach 1:
The vertical projection is introduced only at the bottom of the via where it contacts the insulating region, creating a localized structural feature that reduces PN junction area. This local modification achieves improved measurement precision for leakage current detection without requiring complete redesign of the entire via structure, thus limiting the increase in device complexity to only the necessary local feature.
3Productivity
If high-density TSVs are manufactured, then circuit integration is improved, but defect detection reliability decreases due to masked leakage currents
Solution Approach 1:
The patent changes the PN junction area parameter by introducing the vertical projection structure, which reduces reverse saturation current. This parameter change enables reliable defect detection in high-density TSV configurations where leakage currents would otherwise be undetectable against the background of higher reverse saturation current, thus maintaining defect detection reliability even as circuit integration density increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of electrical testing by reducing the reverse saturation current, allowing for the detection of defects that were previously masked, and simplifies the manufacturing process through reduced masking and etching steps, particularly beneficial for high-density TSVs.
Implementation Method 1
a doped region (20), set in contact with the bottom end (10b) of the through via (10), defining, with the substrate (3), a semiconductor junction that ensures, via an appropriate biasing, electrical insulation of the through via (10) from the substrate (3)
Data Source
AI summary
An embodiment of a process for manufacturing a system for electrical testing of a through via extending in a vertical direction through a substrate of semiconductor material envisages integrating an electrical testing circuit in the body to enable detection of at least one electrical parameter of the through via through a microelectronic buried structure defining an electrical path between electrical-connection elements towards the outside and a buried end of the through via; the integration step envisages providing a trench and forming a doped buried region at the bottom of the trench, having a doping opposite to that of the substrate so as to form a semiconductor junction, defining the electrical path when it is forward biased; in particular, the semiconductor junction has a junction area smaller than the area of a surface of the conductive region in a horizontal plane transverse to the vertical direction, in such a way as to have a reduced reverse saturation current.