Semiconductor Interconnects with Twin Boundaries for Electromigration Resistance

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Solution Overview

Problem

Existing interconnect structures in semiconductor devices face reliability issues due to electromigration and stress migration, which degrade performance as device geometries shrink, leading to increased resistivity and potential device failure.

Innovation Solution

Incorporating high-density twin boundaries in the conductive structure, formed through specific electrodeposition processes and lattice mismatch techniques, to suppress electromigration and stress migration, while maintaining resistance and adhesion properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional interconnect structures are used, then device density can be increased through geometry shrinkage, but electromigration and stress migration occur leading to increased resistivity and device failure

Engineering Contradiction:
Improvedevice densityVSAvoidinterconnect reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the crystallographic parameters of the conductive material by introducing twin boundaries with specific orientations (e.g., {111} twin boundaries in FCC metals). This parameter change in the material structure creates barriers to dislocation motion and atomic migration, thereby suppressing electromigration and stress migration while maintaining the scaled geometry needed for high device density

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite microstructure within the conductive material by combining regions with different crystallographic orientations separated by twin boundaries. This composite structure at the micro-scale provides both the electrical conductivity needed for interconnect function and the structural barriers needed to prevent migration phenomena, resolving the reliability issue while maintaining device density

Inventive Principle:
Principle #40Composite materials

2Productivity

If geometry shrinkage is pursued to increase device density, then more devices can be packed, but electromigration and stress migration effects are exacerbated

Engineering Contradiction:
Improvedevice densityVSAvoidelectromigration and stress migration
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces local variations in crystallographic quality by creating twin boundaries at specific locations within the conductive material. These local structural features act as barriers to atomic migration and dislocation motion, providing localized protection against electromigration and stress migration effects that would otherwise be exacerbated by geometry shrinkage

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent modifies the microstructural parameters of the conductive material by controlling the density, orientation, and spacing of twin boundaries. This parameter change creates a hierarchy of length scales where the twin boundary spacing is much smaller than the overall interconnect dimensions, allowing the material to maintain low resistivity while providing frequent barriers to migration processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of high-density twin boundaries effectively reduces electromigration and stress migration, enhancing the reliability of semiconductor device interconnects without increasing resistivity, thereby improving device performance and longevity.

Implementation Method 1

Incorporating high-density twin boundaries in the conductive structure, formed through specific electrodeposition processes and lattice mismatch techniques, to suppress electromigration and stress migration

Methodology Applied
Scientific EffectTwin boundaries:

Implementation Method 2

formed through specific electrodeposition processes

Methodology Applied
Scientific EffectElectrodeposition: Electrodeposition

Data Source

PatentUS10475742B2Method for forming semiconductor device structure having conductive structure with twin boundaries
Publication Date: 2019.11.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10475742B2 patent drawing
  • US10475742B2 patent drawing
  • US10475742B2 patent drawing

AI summary

A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.