Twin Cell Nonvolatile Memory for Data Retention
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Solution Overview
Problem
Conventional flash memory devices face challenges in data retention at high temperatures and in miniaturization, where the retention performance of memory cells deteriorates, making it difficult to guarantee data integrity and requiring longer write times due to the need for erase and write operations across multiple cells.
Innovation Solution
The use of a twin cell configuration where two memory cells store complementary data, allowing differential amplification to maintain data integrity even when one cell's retention performance degrades, and enabling faster write operations by eliminating the need for initialization control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flash memory cells are used for storage, then the device structure is simple, but data retention performance deteriorates at high temperatures and during miniaturization
Solution Approach 1:
The memory cell is divided into two separate cells (first and second memory cells) that store complementary data. Each cell can be independently controlled and read, allowing the system to segment the storage function to improve retention reliability while managing complexity through functional division
2Reliability
If twin cell configuration with complementary data is used, then data retention characteristics are enhanced, but device complexity increases
Solution Approach 1:
Two memory cells are merged into a functional unit where they store complementary data (inverted logic states). This merging allows the system to achieve improved retention characteristics through the combined behavior of the pair, while the complementary nature reduces the need for additional error correction complexity
3Productivity
If conventional single cell write operation is used, then write operation is simple, but write time increases due to erase and write operations
Solution Approach 1:
The system performs preliminary actions by pre-charging bit lines and pre-positioning data in a complementary state before the actual write operation. This preliminary preparation allows the write operation to complete faster by eliminating the need for separate erase and write steps, improving productivity while managing control complexity through structured sequencing
4Reliability
If differential amplification is used for read operation, then data integrity is maintained, but power consumption increases
Solution Approach 1:
The differential amplification is applied locally only to the selected memory cell pair during read operations, rather than globally across the entire memory array. This localized approach maintains data integrity through differential sensing while minimizing power consumption by activating amplification only where needed, rather than across the whole system
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data retention characteristics, reduces write time, and allows for adaptable read speeds and power consumption, while making it harder to estimate stored information through current observation.
Implementation Method 1
a potential difference between paired bit lines produced by data read out from the pair of memory cells is amplified by a differential sense amplifier
Data Source
AI summary
The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information. Thus, retention performance of an electrically rewritable nonvolatile memory cell is improved.