Twin Cell Threshold Voltage Control Circuit for Secure Erase

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Solution Overview

Problem

In semiconductor devices with twin cells holding complementary data, the difference in threshold voltages between cells can persist after erasure, leading to security issues as the pre-write state may be inadvertently read, which existing technologies fail to adequately address.

Innovation Solution

A control circuit is implemented to manage the threshold voltages of the storage elements, first increasing them to a write verify level and then lowering them to an erase verify level, ensuring that the difference in threshold voltages becomes irrelevant after erasure, thereby preventing the reading of the pre-write state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional pre-write scheme is used to accelerate write before erase operation, then productivity is improved, but security deteriorates because threshold voltage difference between twin cells remains after erase

Engineering Contradiction:

Improvepre-write operation speedVSAvoidsecurity risk from readable pre-write state

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The pre-write operation is divided into two distinct stages: first-stage processing that increases threshold voltage to write verify level, and second-stage processing that lowers threshold voltage to erase verify level. This segmentation allows each stage to serve a specific purpose while preventing security issues.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention changes the threshold voltage parameter dynamically through two stages: first increasing it to attain write verify level, then lowering it to attain erase verify level. This parameter transformation ensures that the final state does not retain characteristics of the initial write state, thereby preventing security issues while maintaining operational efficiency.

Inventive Principle:

Principle #35Parameter changes

2Device complexity

If simple erase operation is performed on twin cells, then device complexity is reduced, but manufacturing precision deteriorates because threshold voltage difference persists after erase

Engineering Contradiction:

Improveerase operation structureVSAvoidthreshold voltage uniformity after erase

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The first-stage processing acts as a preliminary action that increases the threshold voltage of both twin cells to a uniform write verify level before the actual erase operation. This preliminary step ensures that both cells start from the same voltage state, eliminating pre-existing threshold voltage differences and ensuring uniform erase results.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Instead of directly erasing the cells and hoping for uniformity, the invention inverts the approach by first increasing the threshold voltage to a uniform level and then performing the erase operation. This reverse sequence ensures that any subsequent voltage differences are minimized and uniform across both cells.

Inventive Principle:

Principle #13The other way round (Inversion)

3Ease of operation

If threshold voltage is not uniformly adjusted in twin cells, then ease of operation is improved, but reliability deteriorates due to persistent threshold voltage difference after erase

Engineering Contradiction:

Improveerase operation simplicityVSAvoiddata erasure completeness

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The erase operation is segmented into two distinct processing stages with different voltage adjustment objectives. The first stage uniformly increases threshold voltage, while the second stage performs the actual erase. This segmentation ensures both ease of operation through clear stage separation and reliability through uniform voltage adjustment.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention systematically changes the threshold voltage parameter through controlled transformations: first increasing to write verify level, then lowering to erase verify level. This controlled parameter transformation ensures uniform voltage adjustment across twin cells, guaranteeing complete and reliable data erasure while maintaining operational simplicity.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9530518B2Semiconductor device

Publication Date: 2016.12.27 RENESAS ELECTRONICS CORP

AI summary

A control circuit controls execution of first-stage processing for increasing a threshold voltage of both or one of a first storage element and a second storage element until the threshold voltage of the first storage element and the second storage element attains to a prescribed write verify level when a request for erase of twin cell data is received. The control circuit controls execution of second-stage processing for lowering a threshold voltage of the first storage element and the second storage element until the threshold voltage of the first storage element and the second storage element attains to a prescribed erase verify level after the first-stage processing is performed.