Twin Functional Unit Integrity Checking in Reconfigurable Logic
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Solution Overview
Problem
Existing methods for integrity checking of reloadable functional units in programmable logic circuits, such as FPGAs, are resource-intensive and fail to detect integrity issues until malfunctions occur, leaving potential for disruptions and damage to the electronic component.
Innovation Solution
A method involving the use of a trustworthy twin functional unit, preconfigured in the dynamically reconfigurable area, which processes identical input data and compares output data with the reloadable functional unit to ensure correct operation, allowing for real-time integrity checks without additional resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trustworthy twin functional unit is preconfigured for each reloadable functional unit, then integrity checking capability is improved, but device complexity increases
Solution Approach 1:
The twin functional unit is preconfigured during the design phase and integrated into the dynamically reconfigurable area before runtime operations. This preliminary configuration establishes the reference implementation in advance, eliminating the need for complex runtime verification mechanisms and reducing overall system complexity while maintaining high reliability.
2Measurement precision
If output data comparison is performed between reloadable and twin functional units, then detection precision is improved, but use of energy increases
Solution Approach 1:
The integrity checking mechanism operates continuously during runtime by comparing output data from the reloadable functional unit with its twin. This continuous comparison enables real-time detection of integrity issues without requiring separate testing phases, optimizing the balance between detection precision and energy consumption by integrating verification into normal operational flow.
3Reliability
If integrity checking is performed during runtime, then reliability is improved, but productivity decreases
Solution Approach 1:
The integrity checking function is merged with the normal operational function by using the twin functional unit to process identical input data and compare output data during runtime. This merging allows verification to occur concurrently with productive operations, minimizing the impact on overall system productivity while maintaining high reliability through continuous monitoring.
Data Source
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Figure 3B
AI summary
The invention relates to a method for checking the integrity of functional units (HWAA1, HWAA2) which can be reloaded during a runtime of the electronic component (BE) in a dynamically reconfigurable region (DPR) of the electronic component (BE). The electronic component (BE), which is designed as a programmable logic circuit, has, in addition to a static region (SBE), at least one dynamically reconfigurable region (DPR). The reloadable functional units (HWAA1, HWAA2) have predefined interfaces which mate with corresponding interfaces (IIF, OIF) of those subregions (C1, C2) of the dynamically reconfigurable region (DPR) into which the reloadable functional units (HWAA1, HWAA2) can be loaded. For each reloadable functional unit (HWAA1), an associated twin functional unit (HWAAT) is configured (101) in a specified subregion (Ct) of the dynamically reconfigurable region (DPR). A reloadable functional unit (HWAA1) is loaded (102) into a specified subregion (C1, C2) of the dynamically reconfigurable region (DPR), supplied with identical input data (IN) 25 to the associated twin functional unit (HWAAT), and executed (103) in parallel with said twin functional unit. The output data (O_HWAA1, O_HWAAT) of the reloaded functional unit (HWAA1) and of the associated twin functional unit (HWAAT) are compared (104) and the reloaded functional unit (HWAA1) is enabled (105) if a match is found between the output data (O_HWAA1, O_HWAAT) of the reloaded functional unit (HWAA1) and of the associated twin functional unit (HWAAT).