Twisted Block Deinterleaving for Bandwidth-Efficient Memory Writes

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Solution Overview

Problem

The existing ATSC 3.0 data transmission standard results in bandwidth waste during the writing of block strings into memory due to incomplete utilization of transmission bandwidth, as only a small part of the data block is written at a time.

Innovation Solution

A data read-write system that includes a receiving terminal, buffer, and writing module with a twisted block deinterleaving unit, storage unit, and output unit, which reads data blocks in an oblique direction and stores them in a buffer until capacity is reached before writing to memory, optimizing bandwidth usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data blocks are written to memory one small part at a time during transmission, then the data can be progressively stored, but transmission bandwidth is wasted because the block string must be completely transmitted once

Engineering Contradiction:
Improvedata storage completenessVSAvoidtransmission bandwidth waste
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent segments the data transmission process by dividing the block string into multiple data blocks that can be independently processed. The receiving terminal writes these segmented data blocks to the buffer in parallel, allowing the system to store data progressively without waiting for complete transmission of the entire block string, thus reducing bandwidth waste while maintaining data completeness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a buffer as an intermediary component between the receiving terminal and memory. The buffer temporarily stores incoming data blocks during transmission, allowing the system to decouple the transmission rate from the storage rate. This intermediary enables efficient bandwidth utilization by accumulating data blocks before writing them to memory, eliminating the need to transmit the entire block string before storage begins.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If a buffer is introduced to store data blocks before writing to memory, then transmission bandwidth is optimized, but system complexity increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidsystem structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs the buffer with multi-functionality to reduce overall system complexity. The buffer not only stores data blocks during transmission but also manages the coordination between the receiving terminal and memory, handles data block addressing, and controls the writing process. By consolidating multiple functions into a single buffer component, the system avoids the need for separate control mechanisms, thereby optimizing transmission efficiency without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12461682B2Data read-write system and method thereof
Publication Date: 2025.11.04 REALTEK SEMICON CORP
  • US12461682B2 patent drawing
  • US12461682B2 patent drawing
  • US12461682B2 patent drawing

AI summary

A data read-write system includes a receiving terminal, a buffer, a memory and a writing module. The receiving terminal is used for receiving data, and the data includes a plurality of data blocks, and each data block is arranged into a two-dimensional matrix. The buffer includes a plurality of buffer blocks. The writing module includes a twisted block deinterleaving unit, a storage unit and an output unit. The twisted block deinterleaving unit reads each data block to obtain a plurality of first block strings. The storage unit distributes and stores the data blocks in each first block string in each buffer block. The output unit is used for outputting each data block in each buffer block to the memory for storage when the occupied capacity of each buffer block reaches an upper limit of a buffer capacity.