Two-Layer Interconnect Matrix for Custom Circuit Layout
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Solution Overview
Problem
Current circuit design methods, particularly for integrated circuits (ICs) and printed circuit boards (PCBs), are inefficient due to the high number of layers required for interconnects, leading to increased costs and time consumption, and this inefficiency is also applicable to photonic circuits.
Innovation Solution
A customizable circuit design utilizing a two-layer interconnect matrix with L-shaped conductive lines and line segments arranged in a rectangular matrix configuration, where the layers are separated by an insulating layer to establish connections, allowing for selective interconnections between components using conductive paths, which can be achieved through fusion or vias, and applicable to both electrical and photonic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional multi-layer interconnect structures are used in ICs and PCBs, then component interconnection is achieved, but the number of layers and process steps increases, leading to higher costs and longer design time
Solution Approach 1:
The patent transitions from traditional multi-layer planar interconnect structures to a three-dimensional stacked matrix configuration. Conductive lines are arranged in multiple layers (first layer with L-shaped lines, second layer with horizontal and vertical segments) positioned at different vertical levels, enabling interconnections through vertical vias. This spatial reorganization reduces the effective number of interconnect layers needed while maintaining connectivity capabilities.
Solution Approach 2:
The patent implements a hierarchical nested structure where the interconnect matrix is organized into multiple stacked layers, with each layer containing nested conductive patterns. The first layer contains L-shaped conductive lines that connect to vertical vias, which in turn connect to the second layer containing horizontal and vertical line segments. This nested arrangement allows compact integration of multiple interconnect functions within a reduced footprint.
2Ease of manufacture
If the number of interconnect layers is reduced to minimize complexity, then manufacturing cost decreases, but achieving sufficient component interconnection becomes more difficult
Solution Approach 1:
The patent applies different conductive line configurations to different regions and layers of the interconnect matrix. The first layer uses L-shaped conductive lines optimized for certain connection patterns, while the second layer uses combinations of horizontal and vertical line segments for other connection requirements. This localized optimization allows each layer to perform its specific interconnection function efficiently, achieving versatile connectivity with minimal layers.
Solution Approach 2:
The patent creates a flexible and reconfigurable interconnect matrix where conductive paths can be dynamically selected and configured. The matrix structure allows for programmable or selectable interconnections between components by activating specific conductive lines and vias, enabling the same physical structure to adapt to different circuit requirements without requiring additional layers.
3Productivity
If traditional circuit layout methods are used, then component interconnection is achieved, but design time and development cost increase significantly
Solution Approach 1:
The patent pre-establishes a standardized interconnect matrix structure with predefined conductive line patterns, via locations, and layer configurations. This pre-fabricated matrix framework eliminates the need for time-consuming custom layout design for each circuit application. Designers can rapidly configure circuits by selecting and connecting components to the pre-established matrix structure, dramatically reducing design time and accelerating productivity.
Data Source
AI summary
In a customizable circuit an interconnect matrix is provided that includes only two conductive layers, the matrix defining a first layer of L-shaped conductive lines and a second layer of substantially L-shaped conductive line segments that are connected to electrical components.