Two-Layer Memory Coding With Dynamic Layout to Avoid Write Collisions

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Solution Overview

Problem

Existing memory sub-systems face media access collisions and increased buffer lifetimes due to fixed media layouts, which can lead to inefficiencies in data storage and retrieval, especially when multiple write streams are active.

Innovation Solution

Implementing dynamic data placement and a two-layer code with low parity cost, where the media layout is determined based on the availability of integrated circuit dies at the time of input/output scheduling, and using a combination of error correcting and erasure codes to encode data for storage across multiple planes, avoiding collisions and optimizing storage capacity utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed media layout is used, then the media layout is simple to implement, but media access collisions occur and buffer lifetime increases

Engineering Contradiction:
Improvemedia layout implementationVSAvoiddata storage and retrieval efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements dynamic data placement where the media layout is determined based on the availability of integrated circuit dies at the time of input/output scheduling, rather than using a fixed predetermined layout. This dynamic approach adapts to changing system conditions to optimize performance while avoiding media access collisions.

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If a fixed media layout is used, then the system is easier to manage, but buffer lifetime increases and performance decreases

Engineering Contradiction:
Improvesystem managementVSAvoidbuffer lifetime
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The system dynamically determines media layout at I/O scheduling time based on die availability, which reduces buffer lifetime by enabling more efficient data placement and reducing the time data needs to wait in buffers before being written to memory.

Inventive Principle:
Principle #15Dynamics

3Reliability

If storage capacity is over-provisioned to handle wear leveling, then reliability improves, but storage space amplification increases

Engineering Contradiction:
Improvewear leveling capabilityVSAvoidstorage space amplification
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies different coding schemes (error correcting codes and erasure codes) to different portions of data based on their specific requirements. Error correcting codes are used for data requiring high reliability, while erasure codes are used for other data, optimizing the balance between reliability and storage efficiency locally rather than applying a uniform approach.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes coding parameters dynamically by selecting between different code types and configurations based on data characteristics and system conditions, allowing optimization of both reliability and storage space utilization without over-provisioning.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11676679B2Two-layer code with low parity cost for memory sub-systems
Publication Date: 2023.06.13 MICRON TECHNOLOGY INC
  • US11676679B2 patent drawing
  • US11676679B2 patent drawing
  • US11676679B2 patent drawing

AI summary

A memory sub-system configured to encode data using an error correcting code and an erasure code for storing data into memory cells and to decode data retrieved from the memory cells. For example, the data units of a predetermined size are separately encoded using the error correcting code (e.g., a low-density parity-check (LDPC) code) to generate parity data of a first layer. Symbols within the data units are cross encoded using the erasure code. Parity symbols of a second layer are calculated according to the erasure code. A collection of parity symbols having a total size equal to the predetermined size can be further encoded using the error correcting code to generate parity data for the parity symbols.