Two-Level Arbitration in CGRAs to Reduce Head-of-Line Blocking
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Solution Overview
Problem
Coarse grain reconfigurable architectures (CGRAs) face head-of-line blocking issues due to unknown factors in accessing external data processing resources, leading to inefficiencies in data flow graph configurations.
Innovation Solution
Implement a two-level arbitration mechanism using virtual address generators (VAGs) with priority schemes and credit-hog counters to manage access to a top-level network (TLN), ensuring fair bandwidth distribution and reducing head-of-line blocking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single arbitration mechanism is used for managing access to external data processing resources, then the device complexity is reduced, but head-of-line blocking occurs leading to reduced productivity
Solution Approach 1:
The patent divides the arbitration mechanism into two distinct levels: a first arbitration mechanism for the top-level network (TLN) and a second arbitration mechanism for the array-level network (ALN). This segmentation allows each arbitration level to independently manage its specific data flow, preventing head-of-line blocking where a single blocked arbitration point would stall all data access. The first arbiter handles TLN access requests while the second arbiter handles ALN access requests, creating parallel arbitration paths that improve overall data access efficiency.
2Productivity
If priority schemes are implemented to manage frequent access patterns, then productivity is improved through better bandwidth distribution, but device complexity increases due to additional arbitration logic
Solution Approach 1:
The patent implements dynamic priority schemes in both arbitration mechanisms that adapt to current data flow conditions. The first arbiter dynamically prioritizes VAGs based on their access frequency to the TLN, while the second arbiter dynamically prioritizes based on access patterns to the ALN. This dynamic behavior allows the system to automatically optimize bandwidth distribution for frequently accessed resources without requiring complex static configuration, balancing productivity improvement with manageable complexity.
3Productivity
If credit-hog counters are used to track and prioritize frequent accessors, then productivity increases through optimized resource allocation, but device complexity increases due to additional tracking mechanisms
Solution Approach 1:
The credit-hog counters in both arbitration mechanisms operate autonomously to track and prioritize VAGs based on their access patterns. The first credit-hog counter automatically tracks TLN access frequency and adjusts priorities without external intervention, while the second credit-hog counter similarly manages ALN access patterns. This self-service capability allows the arbitration system to automatically optimize resource allocation for frequently accessed resources, improving productivity while keeping the tracking mechanism complexity manageable through automated operation.
Data Source
AI summary
A computing system includes a first network, a second network, multiple first agents connected to the first network, multiple second agents connected to the second network, and an interface circuit interconnecting the two networks. The interface circuit includes multiple request queues, a first arbiter for selecting requests from the second agents for transactions on the first network and entering them into the request queues, and credit counters associated with the first agents. A second arbiter selects requests from the oldest entry of each request queue based on the credit counters, sends transactions over the first network, and removes the selected requests from their respective queues. This system efficiently manages communication between the first and second networks, enhancing overall system performance.