Two-Level LBA Mapping for SSD Wear Reduction
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Solution Overview
Problem
Current systems for converting logical block addresses to physical block addresses in solid state storage are inefficient, requiring faster, smaller, and less expensive solutions to improve performance and reduce wear on storage media.
Innovation Solution
Implementing a two-level address mapping system where a first-level table on the storage controller and a second-level table on solid state storage media work together, with a cache to quickly map logical block addresses to physical block addresses, and utilizing DRAM to store mapping information for faster access and power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single-level address mapping table is used, then the device complexity is low, but the conversion speed and performance are insufficient
Solution Approach 1:
The address mapping table is segmented into two levels: a first-level table stored in the storage controller and a second-level table stored in solid state storage media. This segmentation allows the system to achieve faster address conversion by utilizing the speed advantage of the second-level table while maintaining the structural simplicity of the first-level table, thereby resolving the contradiction between conversion speed and device complexity.
2Measurement precision
If a larger mapping table is implemented, then the mapping precision and completeness improve, but the storage space and cost increase
Solution Approach 1:
The mapping table is divided into two levels with different storage locations. The first-level table maintains a compact structure in the storage controller, while the second-level table provides extended mapping capacity in solid state storage media. This segmentation enables the system to achieve comprehensive address mapping precision without requiring a single large table, thereby reducing overall storage space requirements and cost.
3Speed
If frequent read operations are performed on the mapping table, then the address conversion speed improves, but the wear on storage media increases
Solution Approach 1:
The first-level table acts as an intermediary between the host and the second-level table. It caches frequently accessed mapping entries, allowing the system to perform read operations on this intermediate structure rather than directly on the solid state storage media. This intermediary approach maintains fast address conversion speed while significantly reducing wear on the storage media by minimizing direct read operations on it.
4Speed
If the mapping table is stored entirely in the storage controller, then the access speed is fast, but the recovery time after power outage increases
Solution Approach 1:
The mapping table is segmented and distributed across two storage locations: the storage controller and the solid state storage media. The second-level table is persisted in the solid state storage media, which maintains data even after power outages. This segmentation ensures that critical mapping information is preserved during power failures, significantly reducing recovery time while maintaining fast access speeds through the first-level table during normal operation.
Data Source
AI summary
An access instruction which includes a logical block address (LBA) is received. A first-level table is accessed to obtain a first-level table entry associated with the LBA. From the first-level table entry, a location associated with a second-level table on solid state storage media is determined. The second-level table is accessed at the determined location to obtain a second-level table entry associated with the LBA. From the second-level table entry, a physical block address corresponding to the logical block address is determined.