Two-Level Load-Balancing MPLS Network Traffic
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Solution Overview
Problem
Conventional packet forwarding in networks faces challenges with high-speed processing due to memory access limitations and the need for fast route convergence, especially in MPLS forwarding where ingress routers must handle large routing and forwarding information and frequent updates.
Innovation Solution
The implementation of a line card with a dual-memory structure and logic that stores IGP labels and VPN labels separately, allowing for minimal memory accesses and efficient forwarding decisions, along with load-balancing mechanisms to manage network traffic and route updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If MPLS forwarding is implemented with traditional single-memory structure, then forwarding speed is limited by memory access rate, but increasing memory access speed increases device complexity and cost
Solution Approach 1:
The patent divides the forwarding information base into two separate memory structures: one storing VPN labels and another storing IGP labels. This segmentation allows parallel access to different label types without contention, effectively doubling the forwarding speed while maintaining manageable memory complexity through modular organization.
Solution Approach 2:
The patent introduces a two-dimensional memory access architecture where VPN labels and IGP labels are stored in separate memory spaces that can be accessed simultaneously through different address paths. This dimensional separation eliminates the sequential access bottleneck of traditional single-memory structures without requiring complex high-speed memory interconnects.
2Loss of time
If routing and forwarding information is stored in a single memory structure, then memory access time increases, but separating information into multiple structures increases device complexity
Solution Approach 1:
The forwarding information is segmented into distinct VPN label entries and IGP label entries stored in separate memory locations. Each segment is optimized for its specific access patterns, reducing overall memory access time while the modular structure keeps complexity manageable through clear separation of concerns.
Solution Approach 2:
The patent introduces an intermediary labeling mechanism where VPN labels serve as the primary forwarding index and IGP labels as the secondary path identifier. This intermediary structure allows the system to access forwarding information through a two-stage lookup process that reduces average memory access time compared to searching a single large structure.
3Reliability
If load-balancing is implemented during route updates, then network stability is maintained, but processing overhead increases
Solution Approach 1:
The patent pre-calculates and stores multiple equal-cost paths to each destination in the forwarding tables during normal operation. When route updates occur, the system can immediately switch to pre-computed alternative paths without performing complex real-time calculations, maintaining network stability while minimizing processing overhead during updates.
Solution Approach 2:
The system dynamically changes the forwarding parameter (selected path) based on route update conditions while maintaining the same forwarding structure. During normal operation, traffic flows along primary paths; during updates, the system switches to secondary paths by changing only the path selection parameter rather than restructuring the entire forwarding database, thus maintaining stability with minimal processing overhead.
Data Source
AI summary
An apparatus comprising three memory portions and logic for programming the memory portions is presented. The first memory portion comprises a plurality of first data structures, each which includes an IGP label and an adjacency identifier that identifies one of a plurality of outgoing interfaces in the network element. The second memory portion comprises a plurality of IGP load-halancing entries, each of which includes two or more reference values that point to two or more of the plurality of lirsi data structures. The third memory portion comprises a plurality of BGP load-balancing entries, each of which includes an index value and a pointer. The fourth memory portion comprises a plurality of second data structures, each of which includes a network address identifier and a unique value associated with two or more of the plurality of BGP load-balancing entries.