Two-Level Memory Architecture for Cross-Device Aggregation
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Solution Overview
Problem
Current software implementations for aggregating memory resources across computing devices result in high latencies and degraded user experiences, particularly when streaming high-definition video or gaming, due to limitations in power, thermal capacity, and memory resources in smaller form factors like wearable devices.
Innovation Solution
The implementation of a two-level memory (2LM) architecture that migrates memory contents transparently between devices, utilizing a combination of near and far memory, allowing for seamless aggregation of memory resources across devices with different capabilities, including the use of low-latency interconnect technologies like PCIe and WiGig.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software implementations are used for aggregating memory resources across computing devices, then memory aggregation is achieved, but high latencies and degraded user experiences occur
Solution Approach 1:
The patent introduces a far memory layer as an intermediary between the near memory and remote memory resources. This far memory acts as a buffer that reduces latency by pre-fetching and caching data before it is needed by the near memory, thereby mediating the interaction between local and remote memory systems and eliminating the high latencies associated with direct software-based memory aggregation.
Solution Approach 2:
The system performs preliminary actions by pre-loading data into the far memory before it is actually needed by the application. This proactive data preparation reduces wait times and latencies when data is subsequently accessed from near memory, as the far memory has already prepared the required data in advance.
2Adaptability or versatility
If memory resources are aggregated across devices with different capabilities, then resource utilization is improved, but complexity of memory management increases
Solution Approach 1:
The patent segments the memory system into distinct hierarchical layers: near memory for fast access, far memory for intermediate buffering, and remote memory for capacity expansion. Each layer has specific responsibilities and characteristics, allowing the system to manage diverse memory resources across devices with different capabilities through a standardized segmented architecture rather than attempting uniform management.
Solution Approach 2:
The far memory layer serves multiple functions simultaneously: it acts as an extension of near memory, a cache for remote memory data, a buffer for data transfer between devices, and a management interface for handling memory requests. This multi-functionality allows the system to aggregate memory resources across devices with different capabilities through a single universal interface.
Data Source
AI summary
Examples are disclosed for composing memory resources across devices. In some examples, memory resources associated with executing one or more applications by circuitry at two separate devices may be composed across the two devices. The circuitry may be capable of executing the one or more applications using a two-level memory (2LM) architecture including a near memory and a far memory. In some examples, the near memory may include near memories separately located at the two devices and a far memory located at one of the two devices. The far memory may be used to migrate one or more copies of memory content between the separately located near memories in a manner transparent to an operating system for the first device or the second device. Other examples are described and claimed.


