Two-Mode ADC Comparison Circuit for Fast Image Sensor Conversion
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Solution Overview
Problem
Analog-to-digital converters in image sensors face challenges with offset mismatching, ramp voltage slope mismatching, and high power consumption, particularly due to the use of sampling capacitors and inefficient signal conversion processes.
Innovation Solution
The implementation of an analog-to-digital converter with a comparison signal generation unit that operates in two modes: a first comparison mode for coarse conversion and a second mode for fine conversion using a difference voltage lower than the reference voltage level, eliminating the need for sampling capacitors and optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sampling capacitors are used in the analog-to-digital converter, then signal conversion can be performed, but offset mismatching and ramp voltage slope mismatching occur
Solution Approach 1:
The patent removes sampling capacitors from the converter circuit, extracting the source of offset and ramp voltage mismatching. By eliminating these capacitors, the design achieves better matching precision without compromising signal conversion capability
Solution Approach 2:
The conversion process is divided into two distinct modes: coarse conversion for initial signal processing and fine conversion for precision work. This segmentation allows each mode to be optimized independently, with fine conversion operating at lower voltage levels to minimize mismatching effects
2Device complexity
If conventional single-slope conversion is used, then the converter structure is simple, but operation speed is limited and power consumption is high
Solution Approach 1:
The converter dynamically switches between two operating modes (coarse and fine conversion) based on signal requirements. This dynamic operation enables the system to achieve higher speeds when needed while maintaining simplicity in the overall structure
Solution Approach 2:
The conversion process is segmented into coarse and fine stages, with each stage optimized for specific performance requirements. This segmentation enables faster overall conversion by handling different portions of the signal in parallel or sequential fashion
3Measurement precision
If fine conversion is performed at high voltage levels, then signal precision is maintained, but power consumption increases and conversion time is extended
Solution Approach 1:
The patent changes the voltage level parameter during operation - performing coarse conversion at higher voltage levels for speed, then switching to fine conversion at lower voltage levels for precision. This parameter change reduces power consumption during the fine conversion stage while maintaining necessary signal precision
Data Source
AI summary
An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.