Two-Pass Erase for Non-Volatile Memory Cells
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Solution Overview
Problem
Current non-volatile storage devices face inefficiencies in erasing memory cells, leading to over-erasing, increased time, and power consumption due to the need for multiple erase pulses and verify operations, particularly when trying to achieve precise threshold voltage control.
Innovation Solution
A method involving a trial erase pulse to determine a suitable second erase pulse magnitude based on the threshold voltage distribution, reducing the number of erase pulses and eliminating over-erasing, while optionally using soft programming to compact the erase distribution without additional verification steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple erase pulses with increasing amplitude are applied to ensure complete erasing, then the erasing reliability is improved, but the time consumption and power consumption increase significantly
Solution Approach 1:
The patent applies a preliminary trial erase pulse before the main erase operation to assess the actual erase requirements. This preliminary action determines the appropriate amplitude for subsequent erase pulses, preventing unnecessary application of high-amplitude pulses and reducing overall time consumption while maintaining erasing reliability
Solution Approach 2:
The patent implements feedback by measuring the threshold voltage distribution after the trial erase pulse and using this information to adjust the amplitude of subsequent erase pulses. This feedback mechanism ensures that erase pulses are applied only when necessary and at the minimum required amplitude, reducing both time and power consumption while ensuring complete erasing
2Reliability
If multiple erase pulses with increasing amplitude are applied to ensure complete erasing, then the erasing reliability is improved, but the power consumption increases due to prolonged high voltage application
Solution Approach 1:
The trial erase pulse serves as a preliminary action that determines the actual erase requirements before committing to high-power erase pulses. This prevents unnecessary application of high-voltage pulses, directly reducing power consumption while maintaining erasing reliability
Solution Approach 2:
By measuring threshold voltage distribution after the trial pulse and using this feedback to adjust subsequent pulse amplitudes, the system applies power only when and where needed. This feedback-controlled approach minimizes power consumption while ensuring complete erasing reliability
3Manufacturing precision
If trial erase pulse and threshold voltage measurement are performed to determine second erase pulse magnitude, then over-erasing is minimized, but the process complexity increases
Solution Approach 1:
The patent changes the parameter being measured from individual cell threshold voltages to the overall threshold voltage distribution characteristics after the trial pulse. This parameter change simplifies the measurement process while still providing enough information to determine appropriate erase pulse magnitude, minimizing over-erasing without excessive complexity
Solution Approach 2:
The trial erase pulse serves multiple functions: it begins the erasing process, provides measurement data for determining subsequent pulse amplitude, and prevents over-erasing. This multi-functionality reduces the need for separate verification steps, maintaining erase precision while limiting process complexity
4Manufacturing precision
If soft programming is applied to compact threshold voltage distribution after erasing, then the erase quality is improved, but additional time and power are consumed
Solution Approach 1:
The trial erase pulse acts as a preliminary action that pre-compacts the threshold voltage distribution by removing excess charge, reducing the need for subsequent soft programming operations. This maintains erase quality while minimizing additional time consumption
Solution Approach 2:
By measuring the threshold voltage distribution after the trial pulse and using this feedback to adjust the main erase pulse parameters, the system achieves proper erase compaction in a single main erase operation, eliminating or reducing the need for separate soft programming steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes over-erasing, saves time and power by limiting erase pulses, and reduces the need for extensive verification operations, thereby enhancing the efficiency of the erasing process in non-volatile storage devices.
Implementation Method 1
An erase pulse moves the threshold voltage of the memory cells towards (or beyond) an erase target level
Implementation Method 2
Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised
Data Source
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AI summary
Techniques are disclosed herein for erasing non-volatile memory cells. The memory cells are erased using a trial erase pulse. A suitable magnitude for a second pulse is determined based on the magnitude of the trial erase pulse and data collected about the threshold voltage distribution after the trial erase. The second erase pulse is used to erase the memory cells. In one implementation, the threshold voltages of the memory cells are not verified after the second erase. Soft programming after the second erase may be performed. The magnitude of the soft programming pulse may be determined based on the trial erase pulse. In one implementation, the memory cells' threshold voltages are not verified after the soft programming. Limiting the number of erase pulses and soft programming pulses saves time and power. Determining an appropriate magnitude for the second erase pulse minimizes or eliminates over-erasing.