Two-Phase Clock Generation for Symmetric Non-Overlapping Charge Pumps
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Solution Overview
Problem
Existing two-phase non-overlapping clock signal generation methods in circuit applications, such as charge pumps, face challenges in achieving symmetric waveforms, which affects power conversion efficiency due to overlapping logical states in clock signals.
Innovation Solution
A clock generation circuit utilizing a delay circuit and an inverter to generate non-inverted and inverted clock signals based on a single input clock signal, with the delay circuit set to improve symmetry, ensuring non-overlapping logical states and optimizing power conversion efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional clock signal generation methods are used, then the circuit structure is simple, but the waveform symmetry is poor and power conversion efficiency is reduced
Solution Approach 1:
The clock signal generation is divided into separate functional blocks: an inverter that generates the inverted clock signal, and delay circuits that generate non-inverted clock signals with controlled delays. This segmentation allows independent optimization of each block to achieve symmetric waveforms while maintaining overall circuit manageability.
Solution Approach 2:
Delay circuits are introduced as intermediary components between the input clock signal and the final clock outputs. These delay circuits act as mediators that control the timing and symmetry of the generated clock signals, enabling precise adjustment of waveform characteristics without fundamentally changing the overall circuit architecture.
2Manufacturing precision
If delay circuit is added to improve waveform symmetry, then power conversion efficiency is improved, but device complexity increases
Solution Approach 1:
The delay circuits utilize controllable delay elements where the delay amount can be adjusted by changing operational parameters such as control voltages or current levels. This allows precise control of waveform symmetry through parameter adjustment rather than requiring complex fixed-structure modifications, enabling fine-tuning of clock signal characteristics.
Solution Approach 2:
The delay circuits are designed to serve multiple functions: they generate non-inverted clock signals, control waveform symmetry, and provide adjustable delay amounts. This multi-functionality reduces the need for separate dedicated components for each function, thereby limiting the increase in overall device complexity while achieving precise waveform control.
Data Source
AI summary
A clock generation circuit includes: a two-phase clock generation circuit configured to generate a first phase clock signal and a second phase clock signal based correspondingly on a non-inverted clock signal and an inverted clock signal, the first phase clock signal and the second phase clock signal exhibiting non-overlapping logical high states; an inverter configured to generate the inverted clock signal based on an input clock signal; and a delay circuit which is non-inverter-based and which is configured to generate the non-inverted clock signal based on the input clock signal, the delay circuit having a predetermined delay sufficient to cause a difference between a first duration and a second duration within a clock cycle to be less than a predetermined tolerance.