Two-Phase Packet Parser With Loopback for Tunneling Protocols

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Solution Overview

Problem

Existing communication devices face inefficiencies in processing packets with tunneling protocols due to increased load on the central processing unit when packet sizes exceed the parsing capacity of the packet parser, leading to reduced overall system efficiency.

Innovation Solution

A communication device employing a two-phase packet parsing method using a first parser circuit to parse tunneling protocol data and a second parser circuit to parse Ethernet protocol data, with a forwarding circuit to manage packet forwarding and utilize a loopback unit for multiple rounds of parsing when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the packet parser parses packets with tunneling protocols, then the parsing capacity is exceeded and CPU load increases, but system efficiency decreases

Engineering Contradiction:
Improveparsing capacityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The packet parsing function is segmented into two independent parser circuits: a first parser circuit that parses packets based on tunneling protocols, and a second parser circuit that parses packets based on Ethernet protocols. This segmentation allows simultaneous processing of different packet types without overwhelming the CPU, resolving the contradiction between maintaining parsing capacity and preserving system efficiency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the packet size exceeds parsing capacity, then CPU intervention is required, but processing time increases

Engineering Contradiction:
Improveparsing capacityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

A forwarding circuit acts as an intermediary between the packet parser and the CPU. When a packet exceeds parsing capacity, the forwarding circuit automatically forwards it to the CPU without requiring CPU intervention for every packet, thereby reducing processing time while maintaining reliable parsing capacity for normal packets.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If multiple parser circuits are used, then parsing efficiency improves, but device complexity increases

Engineering Contradiction:
Improveparsing efficiencyVSAvoidparser structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The forwarding circuit is designed with multi-functionality, serving both as a packet forwarder for normal packets and as a router for oversized packets to the CPU. This universal component reduces device complexity by consolidating multiple functions into a single circuit rather than requiring separate dedicated circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250233933A1Communication device and two-phase packet parser enhancement method with loopback unit
Publication Date: 2025.07.17 REALTEK SEMICON CORP
  • US20250233933A1 patent drawing
  • US20250233933A1 patent drawing
  • US20250233933A1 patent drawing

AI summary

A communication device includes a first parser circuit, a second parser circuit, and a forwarding circuit. The first parser circuit is configured to parse first data in a packet based on a tunneling protocol to obtain first parsing information and an offset value. The second parser circuit is configured to parse second data in the packet according to the offset value to obtain second parsing information, in which the offset value is utilized to indicate a starting position of the second data in the packet. The forwarding circuit is configured to forward the packet according to the first parsing information and the second parsing information.