Two-Pin Serial Bus Interface for Reduced Pin Count
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Solution Overview
Problem
The reduction in package size for semiconductor manufacturing requires a reduced pin interface for serial communication, as most pins are used for functional purposes, necessitating a more efficient method for data transmission between a controller and a target circuit.
Innovation Solution
A two-pin serial data communications interface using one wire for data transmission and one wire for a clock signal, enabling bi-directional communication between a controller and internal registers of an integrated circuit, utilizing bi-directional external data signal and external clock signal leads with associated circuitry for data I/O, port control, and instruction/address management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If package size is reduced, then integration density is improved, but the number of available pins for communication is reduced
Solution Approach 1:
The patent combines bidirectional data transmission and clock signaling into a two-pin interface (TCK and TDI pins shared for communication), eliminating the need for separate TDO and TMS pins. This merging of functions reduces pin count while maintaining full JTAG communication capability, directly resolving the contradiction between reduced package size and available communication pins.
Solution Approach 2:
The existing TCK and TDI pins are made multi-functional by using them for both clock signaling and bidirectional data transmission. The same physical pins serve multiple communication purposes through time-division multiplexing and protocol control, increasing pin versatility without adding more physical pins, thus addressing the pin availability constraint in reduced-size packages.
2Quantity of substance
If pin count is reduced, then package size is improved, but communication complexity increases
Solution Approach 1:
The communication interface dynamically switches between different operational modes (clock mode, data input mode, data output mode) using the same two pins. The controller and target circuit coordinate through dynamic state transitions and protocol handshaking, allowing flexible resource utilization that reduces pin count while managing complexity through controlled dynamic behavior rather than static dedicated connections.
Solution Approach 2:
The communication protocol uses periodic clock cycles to structure data transmission, with each clock period dedicated to a specific phase (sampling, holding, shifting). This periodic structure organizes the bidirectional communication on two pins into manageable time slots, reducing communication complexity by imposing a regular rhythm on the interaction between controller and target circuit.
Data Source
AI summary
A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design.