Two-Pixel Image Processor Circuit with Adaptive Mode Sharing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display systems requiring a two-pixel mode necessitate two sets of image processor circuits, leading to increased circuit area and idle resources when not in use.
Innovation Solution
An image processor circuit with a first and second processor circuit processes separate parts of input data to generate output for display, optimizing resource utilization in both two-pixel and picture-in-picture modes without excessive circuit area expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two sets of image processor circuits are disposed to support two-pixel mode, then processing capability for two pixels is improved, but circuit area increases
Solution Approach 1:
The image processor circuit is designed to perform multiple functions: it can process two pixels simultaneously in two-pixel mode using both first and second processor circuits, or process single pixel in picture-in-picture mode using only the first processor circuit. This multi-functionality allows the same hardware to adapt to different display modes, improving productivity without permanently increasing circuit area for unused functionality.
Solution Approach 2:
The system dynamically switches between different operational modes (two-pixel mode and picture-in-picture mode) by activating different processor circuits based on the required display function. This dynamic configuration allows the circuit area to be effectively utilized only when needed, rather than permanently allocating resources for all possible modes simultaneously.
2Productivity
If two sets of image processor circuits are disposed to support two-pixel mode, then processing capability for two pixels is improved, but resource utilization deteriorates when not in use
Solution Approach 1:
The first processor circuit is designed to be universally applicable for both two-pixel mode (processing first pixel) and picture-in-picture mode (processing both first and second pixels). This universality ensures that when the system operates in picture-in-picture mode, the second processor circuit remains idle rather than wasting resources, as the first processor circuit can handle single-pixel processing independently.
Solution Approach 2:
The system dynamically activates only the necessary processor circuits based on the current display mode. In picture-in-picture mode, only the first processor circuit is activated, preventing the second processor circuit from consuming power unnecessarily. This dynamic resource management eliminates idle resource waste while maintaining the capability to switch to two-pixel mode when needed.
3Area of stationary object
If single image processor circuit is used for both pixels, then circuit area is reduced, but processing speed for high pixel rate images deteriorates
Solution Approach 1:
The image processor circuit is segmented into two independent processor circuits (first and second), each capable of processing pixel data independently and simultaneously. This segmentation allows the system to achieve high processing speeds for two-pixel mode by utilizing both circuits in parallel, while still maintaining a compact overall circuit area by sharing common components and control logic between the two processors.
Solution Approach 2:
The first and second processor circuits share common functional blocks and control mechanisms, merging redundant components to reduce overall circuit area. This combining approach allows the system to maintain high processing speed through parallel operation while minimizing the total area occupied by shared resources such as memory interfaces, control logic, and output buffers.
Data Source
AI summary
An image processor circuit includes a first processor circuit and a second processor circuit. In a two-pixel mode, the first processor circuit is configured to process a first part of first input data and the second processor circuit is configured to process a second part of the first input data to generate output data for a display panel to display. The first input data includes K columns, the first part includes 1st to Mth columns of the first input data, and the second part includes Nth to Kth columns of the first input data. N is less than K/2 and M is greater than K/2.