Two-Point DPLL Modulation for Wideband Oscillator Control

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Solution Overview

Problem

Existing digital phase-locked loops (DPLLs) face challenges in effectively modulating oscillators with wideband signals without disturbing their normal operation, especially when the bandwidth of the modulating signal exceeds the closed-loop bandwidth of the DPLL.

Innovation Solution

A DPLL design incorporating two-point modulation, which includes a phase-to-digital converter and a loop filter operating within a loop, with separate processing units for lowpass and highpass modulation paths. The lowpass path supports narrowband modulation, while the highpass path supports wideband modulation, using an accumulator, scaling unit, summers, and a divider to generate control signals for the oscillator, and an adaptive delay unit to match delays across paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single modulation path is used in a DPLL, then the device complexity is reduced, but the ability to modulate with wideband signals is limited

Engineering Contradiction:
Improvemodulation bandwidth capabilityVSAvoidmodulation path structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The modulation function is segmented into two separate paths: a lowpass modulation path for narrowband signals and a highpass modulation path for wideband signals. Each path has its own processing unit optimized for its specific bandwidth range, allowing the DPLL to handle both narrowband and wideband modulation without requiring a single complex path that would be inefficient for both cases.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the modulating signal bandwidth exceeds the closed-loop bandwidth, then wideband modulation capability is achieved, but disturbance to normal DPLL operation increases

Engineering Contradiction:
Improvewideband modulation supportVSAvoidnormal operation stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

By segmenting the modulation paths with distinct bandwidth characteristics (lowpass for narrowband, highpass for wideband), the system can apply wideband modulation through the highpass path without allowing it to interfere with the narrowband control loop operation. The separate paths isolate the wideband modulation effects from the precision narrowband phase-locking function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The highpass modulation path acts as an intermediary that introduces wideband modulation effects without directly interfering with the primary phase-locking loop. The modulation is applied in a way that separates it from the narrowband control signals, allowing wideband capability while maintaining normal operation stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If an accumulator is used in the lowpass path, then frequency to phase conversion is achieved, but the processing complexity increases

Engineering Contradiction:
Improvefrequency to phase conversion accuracyVSAvoidprocessing unit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces traditional analog frequency-to-phase conversion mechanisms with a digital accumulator-based approach. The accumulator performs the conversion through digital counting and accumulation operations, which are implemented in software or digital logic rather than analog circuitry, achieving precise conversion while maintaining manageable complexity through digital processing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP2430745B1Digital phase-locked loop with two-point modulation using an accumulator and a phase-to-digital converter
Publication Date: 2020.08.12 QUALCOMM INC
  • EP2430745B1 patent drawingFigure 1
  • EP2430745B1 patent drawingFigure 2
  • EP2430745B1 patent drawingFigure 3

AI summary

A digital phase-locked loop (DPLL) supporting two-point modulation is described. In one design, the DPLL includes a phase-to-digital converter and a loop filter operating in a loop, a first processing unit for a lowpass modulation path, and a second processing unit for a highpass modulation path. The first processing unit receives an input modulating signal and provides a first modulating signal to a first point inside the loop after the phase-to-digital converter and prior to the loop filter. The second processing unit receives the input modulating signal and provides a second modulating signal to a second point inside the loop after the loop filter. The first processing unit may include an accumulator that accumulates the input modulating signal to convert frequency to phase. The second processing unit may include a scaling unit that scales the input modulating signal with a variable gain.