Two-Stage Contact Plug Formation for High Aspect Ratio Semiconductor Devices
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Solution Overview
Problem
The high aspect ratio of contact holes in semiconductor devices leads to defects, poor contact formation, and increased etching time, resulting in residue contamination and reduced conductivity due to the lengthy etching process and narrow width of the contact holes.
Innovation Solution
The method involves forming a single contact plug in two separate stages by dividing the contact hole formation into two ILD layers, where the first ILD layer determines the depth of the first contact plug and the second ILD layer determines the depth of the second contact plug, reducing the aspect ratio and etching time, and improving contact quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the contact hole size and spacing are decreased to increase transistor density, then the transistor density is improved, but the aspect ratio of the contact hole increases significantly making it more difficult to accurately form stacked contact structure
Solution Approach 1:
The contact hole formation process is segmented into two separate etching stages. First, a preliminary contact hole is etched through the first ILD layer to a first depth. Then, a final contact hole is etched through the second ILD layer to the contact etch stop layer. This segmentation allows each etching step to operate at lower aspect ratios, improving manufacturing precision while maintaining high transistor density.
2Quantity of substance
If the contact hole width is reduced to increase transistor density, then the transistor density is improved, but the etching time increases and residue contamination increases reducing conductivity
Solution Approach 1:
The etching process is divided into two separate stages with different objectives. The first etching stage creates a preliminary hole through the first ILD layer, and the second etching stage completes the hole through the second ILD layer. This segmentation reduces the etching time for each individual step compared to a single deep etch, while also reducing residue contamination by limiting the depth each etch must reach.
3Reliability
If the contact hole depth is increased to maintain contact quality, then the contact quality is improved, but the aspect ratio increases making the etching process more difficult and time-consuming
Solution Approach 1:
The contact hole formation is segmented into two etching stages with different depth targets. The first stage etches to a first depth through the first ILD layer, and the second stage etches to a second depth through the second ILD layer. This segmentation maintains the total required contact depth for quality while reducing the complexity of each individual etching step by lowering the aspect ratio each step must manage.
Solution Approach 2:
The contact etch stop layer serves as an intermediary reference plane that defines the final depth of the contact hole. By establishing this intermediate layer between the two ILD layers, the etching process can be precisely controlled at each stage without requiring excessive depth in a single step, thereby reducing aspect ratio complexity while maintaining contact quality.
Data Source
AI summary
A method of fabricating semiconductor device includes forming a plurality of gate structures on a semiconductor substrate. A first inter layer dielectric layer is deposited on the gate structures. A first contact plug is formed in the first inter layer dielectric layer in between every two immediately adjacent gate structures. An etch stop layer is deposited on the first inter layer dielectric layer. A second inter layer dielectric layer is deposited on the first inter layer dielectric layer. A second contact plug is formed in the second inter layer dielectric layer aligning with the first contact plug. A metal layer is deposited overlying the second inter layer dielectric layer and the second contact plug.