Two-Stage Data Decompression for High-Speed Solid State Storage
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Solution Overview
Problem
Conventional compression and decompression techniques struggle to achieve high-speed data processing in solid state storage, particularly in systems using NAND Flash memory, as they cannot keep up with the performance requirements of modern Flash-based memories, which limits the ability to operate at rates approaching 4 GB/s without significant expense and complex architectures.
Innovation Solution
A two-stage decompression system is implemented, utilizing Lempel-Ziv compression followed by variable length coding, with a focus on optimizing decompression rates to match the aggregate bandwidth of multiple Flash chips, including the use of Variable Length Decoders (VLDs), First-In-First-Out circuits (FIFOs), and a reverse Lempel-Ziv unit (UNLZ) to reconstruct original data efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional compression and decompression algorithms are used in solid state storage, then data can be compressed to save cost and reduce write amount, but the processing speed cannot keep up with Flash memory performance requirements
Solution Approach 1:
The decompression process is divided into two distinct stages: first stage decompression using a simplified algorithm optimized for speed, and second stage decompression using a more sophisticated algorithm for higher compression ratios. This segmentation allows each stage to be optimized independently, with the first stage handling the bulk of data at high speed and the second stage refining the compression without becoming the bottleneck.
Solution Approach 2:
The patent extracts the computationally intensive variable length decoding operations from the critical path of the decompression pipeline. By separating these operations and performing them in parallel or after the main data flow is reconstructed, the patent removes the bottleneck that prevented achieving 4 GB/s decompression speeds.
2Productivity
If more Flash chips are operated in parallel to increase data rate, then aggregate bandwidth increases, but the cost and system complexity increase significantly
Solution Approach 1:
The patent changes the operational parameters of the decompression system by implementing a two-stage approach with different compression ratios for different data types. This allows the system to achieve effective bandwidth utilization without requiring excessive parallel Flash chips, as the decompression pipeline is optimized to handle the data flow from a manageable number of chips efficiently.
3Loss of substance
If lossless compression algorithms like Lempel-Ziv are used, then compression ratio is improved, but decompression complexity and processing time increase
Solution Approach 1:
The patent segments the compression process into two stages with different objectives. The first stage uses a faster compression algorithm that achieves moderate compression ratios, while the second stage applies more sophisticated techniques for additional compression. This segmentation prevents any single stage from becoming too complex or time-consuming, maintaining overall decompression speed while achieving good compression ratios.
Data Source
AI summary
Compression and decompression of data at high speed in solid state storage is described, including accessing a compressed data comprising a plurality of blocks of the compressed data, decompressing each of the plurality of blocks in a first stage of decompression to produce a plurality of partially decompressed blocks, and reconstructing an original data from the partially decompressed blocks in a second stage of decompression.