Two-Stage Etching Process for Semiconductor Gate Side Wall Formation
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Solution Overview
Problem
In semiconductor device manufacturing, it is challenging to reduce residue and minimize substrate damage during the formation of a side wall on a gate electrode, as increasing etching capability to reduce residue can lead to decreased selectivity of insulating films and potential etching of the substrate, while high-selectivity conditions can result in reaction product deposition, affecting etching rates and stopping the process.
Innovation Solution
A method involving a two-stage etching process using an etching gas with varying fluorine to hydrogen ratios, where the first process has more than 1.5 times the number of fluorine atoms than hydrogen atoms to reduce reaction product deposition, and the second process has fewer fluorine atoms to enhance etching selectivity, allowing for controlled exposure of the lower-layer insulating film and suppression of substrate etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching capability is increased to reduce residue, then residue is reduced, but selectivity of insulating films decreases and substrate may be etched
Solution Approach 1:
The etching process is divided into two distinct stages: a first etching process with high etching capability (using gas with F/H ratio > 1.5) to effectively remove residue, and a second etching process with high selectivity (using gas with F/H ratio ≤ 1.5) to protect the substrate. This segmentation allows each stage to optimize for its specific function without compromising the other.
Solution Approach 2:
The patent changes the composition parameters of the etching gas between two processes. The first process uses gas with fluorine atoms more than 1.5 times the number of hydrogen atoms for aggressive etching, while the second process uses gas with fluorine atoms not more than 1.5 times hydrogen atoms for selective etching. This parameter change enables transition between high etching capability and high selectivity modes.
2Reliability
If etching is performed under high-selectivity conditions, then substrate etching is suppressed, but reaction product may be deposited on etching surface causing etching to stop
Solution Approach 1:
The first etching process is performed preliminarily to remove most of the second insulating film and reduce residue formation. By conducting aggressive etching first when residue deposition is less problematic, the subsequent second process can focus on selective substrate protection without being hindered by residue-related etching stoppage.
Solution Approach 2:
The etching process alternates between two distinct modes: a first periodic stage with high etching capability and a second periodic stage with high selectivity. This periodic switching allows the system to exploit the advantages of both approaches—aggressive residue removal followed by careful selective etching—thereby maintaining productivity while protecting the substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces residue deposition and maintains high etching selectivity, preventing substrate etching and ensuring consistent transistor characteristics by optimizing the etching process through the controlled use of fluorine and hydrogen in the etching gas.
Implementation Method 1
performing a first etching process of etching the second insulating film by using an etching gas containing fluorine and hydrogen
Implementation Method 2
performing a first etching process of etching the second insulating film by using an etching gas containing fluorine and hydrogen
Data Source
AI summary
A method of manufacturing a semiconductor device is provided. The method comprises forming a first insulator above the substrate, forming a second insulator on the first insulator, performing a first etching process of etching the second insulator by fluorine and hydrogen contained gas to expose the first insulator while leaving a portion of the second insulator which covers a side face of the gate electrode and performing a second etching process of etching a portion of the first insulator exposed by the first etching process. The first etching process includes a first process and a second process performed after the first process. A reaction product is less deposited in the first process than in the second process and etching selectivity of the second insulator with respect to the first insulator is higher in the second process than in the first process.