Two-Stage FEC Interface for High-Rate Fiber-Optic Transceivers

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Solution Overview

Problem

Fiber-optic networks face data corruption issues due to noise and intersymbol interference, leading to bit errors and erasures during data transmission, which existing systems struggle to address effectively, especially as data transmission rates increase.

Innovation Solution

The implementation of a transceiver system with a fiber-optic interface unit and a host unit, featuring dual forward error correction (FEC) decoders - a soft-decision input LDPC decoder at the fiber-optic interface unit and a hard-decision input LDPC decoder at the host unit - that work in cascade to correct errors, ensuring seamless and efficient data transmission by leveraging increased coding gain and maintaining line rate homogeneity across optical and electrical interfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data transmission rate is increased, then productivity is improved, but bit errors and data corruption increase due to noise and intersymbol interference

Engineering Contradiction:
Improvedata transmission rateVSAvoiddata transmission reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The error correction function is segmented into two distinct stages: a first FEC decoder at the fiber-optic interface unit and a second FEC decoder at the host unit. This segmentation allows each decoder to handle specific types of errors independently, with the first decoder addressing optical interface errors and the second decoder addressing electrical interface errors, thereby maintaining reliability at higher transmission rates

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first FEC decoder acts as an intermediary between the optical interface and the host unit, pre-correcting errors before data reaches the host. This intermediary error correction layer protects the subsequent data processing from corruption, enabling higher transmission rates without compromising overall reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If high-complexity error correction is used, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically selects between low-complexity and high-complexity decoding modes based on channel conditions. When the channel quality is good, the low-complexity decoder suffices, conserving power. When channel conditions deteriorate, the system switches to high-complexity decoding to maintain reliability, thus adapting power consumption to actual needs

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the complexity parameter of the error correction decoder based on operating conditions. By adjusting the decoding complexity rather than always using maximum complexity, the system achieves reliable error correction only when necessary, thereby reducing overall power consumption while maintaining required reliability levels

Inventive Principle:
Principle #35Parameter changes

3Reliability

If dual FEC decoders are implemented, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction robustnessVSAvoiddecoder configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dual FEC decoder system is segmented into two distinct functional units: the first FEC decoder integrated into the fiber-optic interface unit and the second FEC decoder in the host unit. This spatial and functional segmentation simplifies the overall system architecture by distributing complexity across separate modules, making each unit's design and implementation more manageable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fiber-optic interface unit with the first FEC decoder serves multiple functions: optical signal reception, initial error correction, and data forwarding to the host. This multi-functionality reduces the need for separate dedicated components, thereby managing device complexity while maintaining enhanced reliability through dual error correction

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11799500B2PMD-to-TC-MAC interface with 2-stage FEC protection
Publication Date: 2023.10.24 MAXLINEAR INC
  • US11799500B2 patent drawing
  • US11799500B2 patent drawing
  • US11799500B2 patent drawing

AI summary

A system for a fiber-optic network includes a transceiver. The transceiver includes a fiber-optic interface unit and a host unit. The host unit includes a low-complexity error correction decoder and a high-complexity error correction decoder. One or both from the low-complexity error correction decoder and the high-complexity error correction decoder are selected to decode input data from the fiber-optic interface unit, the input data including codewords.