Two-Stage Voltage Reduction Architecture for Low-Loss GPU Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing power requirements of intelligent data processing chips, such as GPU, CPU, and NPU, have led to larger power supply voltage differences, resulting in increased transmission losses and limited dynamic response capabilities due to high currents and parasitic resistance/inductance in traditional two-stage power supply circuits.
Innovation Solution
A power supply architecture with multiple series combinations of front-stage and post-stage circuit units, each connected via low-loss connectors, replacing a single bus with independent buses to reduce current and shorten transmission paths, allowing for reduced parasitic resistance and inductance, and enabling current sharing through magnetic coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the bus voltage is reduced to increase working frequency, then the working frequency of the buck circuit can be increased to 2 MHz or higher, but the current of the bus rises greatly and transmission loss becomes large
Solution Approach 1:
The patent divides the single high-current bus into multiple parallel bus structures, each carrying a portion of the total current. This segmentation reduces the current density in each individual bus, thereby reducing transmission loss while maintaining the required working frequency. The multiple buses work in parallel to collectively supply the total current needed by the load.
2Power
If a single bus is used to converge and shunt large current, then the power supply can meet the current requirements, but additional transmission inductance and resistance are introduced, resulting in increased loss and slow dynamic response
Solution Approach 1:
The patent segments the single bus into multiple parallel buses, reducing the current carried by each bus. This reduces the parasitic resistance and inductance in each bus path, thereby reducing transmission loss and improving dynamic response while still meeting the total current supply requirement.
Solution Approach 2:
The patent introduces a new dimensional approach by using multiple parallel bus paths instead of a single bus. This multi-dimensional current distribution approach reduces the effective parasitic inductance and resistance by providing multiple concurrent current paths, thereby reducing transmission loss and improving dynamic response.
3Power
If a single bus is used to converge and shunt large current, then the power supply can meet the current requirements, but more output capacitors are required
Solution Approach 1:
The patent segments the single bus into multiple parallel buses, which distributes the current and reduces the ripple current on each bus. This segmentation allows for reduced capacitor sizing and fewer capacitors are needed to achieve the same filtering performance, thereby reducing device complexity while maintaining current supply capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture significantly reduces transmission losses, enables efficient current sharing, and enhances dynamic response capabilities, while minimizing the need for capacitors and simplifying controller complexity.
Implementation Method 1
the output end of the front-stage circuit unit and the input end of the post-stage circuit unit are electrically connected through a low-loss electric connector
Implementation Method 2
the transformer of the front-stage DC/DC converts the input voltage Vin into a bus voltage Vbus
Data Source
AI summary
A power supply architecture comprises at least two series combinations. Each series combination comprises at least one front-stage circuit unit and at least one post-stage circuit unit, and the input ends of the front-stage circuit units are electrically connected; and the front-stage circuit unit is used for converting an input voltage to an intermediate voltage; the front-stage circuit unit comprises a front-stage power semiconductor and a front-stage passive circuit element which are electrically connected with each other, and the post-stage circuit unit is used for converting the intermediate voltage to a output voltage; and the post-stage circuit unit comprises a post-stage power semiconductor and a post-stage passive circuit element which are electrically connected with each other; and in each series combination, the output end of the front-stage circuit unit and the input end of the post-stage circuit unit are electrically connected through a low-loss electric connector.


