Two-Stage Level Shift Circuit for High-Voltage Display Drivers

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Solution Overview

Problem

Existing level shift circuits in display drivers face issues with proper functioning due to significant differences in gate-source voltages between P-channel and N-channel transistors, leading to inefficiencies and increased circuit size when trying to achieve high amplitude signal shifts.

Innovation Solution

A level shift circuit configuration that utilizes two-phase level shifting with specific transistor and resistance element arrangements to manage current flow and voltage differences, allowing for efficient high amplitude signal generation without significant circuit size increase, using transistors with low current driving capability and current restricting elements to enhance operation speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the size of transistors is increased to make the level shift circuit function correctly, then the circuit can properly handle significant voltage differences, but the circuit area increases significantly

Engineering Contradiction:
Improvelevel shift circuit functionalityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the level shift operation into two separate phases: a first level shift circuit shifts the input signal to an intermediate amplitude level, and a second level shift circuit shifts the intermediate signal to the final high amplitude level. This segmentation allows each circuit stage to use appropriately sized transistors for its specific voltage range, avoiding the need for oversized transistors that would be required if a single stage attempted to handle the entire voltage swing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediate signal level as a mediator between the low amplitude input signal and the high amplitude output signal. The first level shift circuit generates this intermediate signal, which then serves as the input to the second level shift circuit. This intermediary approach allows the system to bridge significant voltage gaps without requiring transistors that can directly handle the full voltage difference, thereby reducing the required transistor sizes and overall circuit area.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If a diode-connected transistor is used to limit driving current, then through current is suppressed and operation speed improves, but the circuit cannot properly handle significant voltage differences between input and output signals

Engineering Contradiction:
Improveoperation speedVSAvoidlevel shift circuit functionality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies segmentation by creating two separate level shift circuits, each handling a specific portion of the total voltage swing. The first level shift circuit operates with smaller voltage differences where diode-connected transistors can effectively limit current and improve speed. The second level shift circuit handles the remaining voltage transition. This segmentation allows diode-connected transistors to be used effectively in the first stage without compromising the ability to handle significant overall voltage differences.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10255847B2Level shift circuit and display driver
Publication Date: 2019.04.09 LAPIS SEMICON CO LTD
  • US10255847B2 patent drawing
  • US10255847B2 patent drawing
  • US10255847B2 patent drawing

AI summary

A level shift circuit is configured to receive reference voltage and first to third voltages, and to generate an output signal. The voltages satisfy a condition in which the reference voltage<the first voltage<the second voltage<the third voltage or the reference voltage>the first voltage>the second voltage>the third voltage. The level shift circuit includes a first level shift circuit configured to receive a first signal having a first amplitude within a difference between the reference and first voltages, and level shift the first signal to a second signal having a second amplitude within a difference between the reference and second voltages, and a second level shift circuit configured to level shift the second signal to a third signal having a third amplitude within a difference between the reference and third voltages, and output the third signal as the output signal.