Two-Stage Level Shifters for Accurate Memory Cell Reading
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Sense amplifiers in memory devices face challenges in accurately determining cell states due to manufacturing variability and extrinsic noise, which reduces the read window and increases power consumption, especially with the use of current mirrors that contribute to circuit variability.
Innovation Solution
A level shifter device comprising a first and second stage level shifter, where the first stage transforms an input signal to a voltage between a VPS control voltage and ground or VDD supply voltage, and the second stage transforms it to a voltage between ground and VDD supply voltage, with variably controlled control voltages to account for environmental and manufacturing factors, eliminating the need for current mirrors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If current mirrors are used to improve sense amplifier accuracy, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent removes current mirrors from the sense amplifier circuit entirely, extracting the problematic component that caused transistor mismatch and circuit variability. The sense amplifier achieves accurate cell state detection without relying on current mirrors, thereby eliminating the source of complexity and variability while maintaining measurement precision through alternative circuit design.
Solution Approach 2:
The patent replaces complex current mirror circuits with simpler, more robust circuit elements that are less susceptible to manufacturing variability. The design uses basic transistors and resistors in a configuration that tolerates process variations, effectively substituting expensive, variability-prone current mirrors with cheaper, more stable components.
2Measurement precision
If current mirrors are used to improve sense amplifier accuracy, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent removes current mirrors from the sense amplifier circuit, extracting the high-power-consuming component. The alternative design achieves the same measurement precision function using significantly less power, as the simplified circuit topology eliminates the continuous current flow required by current mirror operations.
3Device complexity
If manufacturing variability is not compensated, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
The patent designs the sense amplifier circuit with inherent robustness against manufacturing variability from the outset. The circuit topology and component selection are chosen to cushion against process variations, ensuring that detection accuracy is maintained without requiring complex compensation mechanisms. The design anticipates variability and builds tolerance into the fundamental circuit architecture.
Solution Approach 2:
The patent optimizes circuit parameters such as transistor sizing, bias conditions, and component ratios to achieve insensitivity to manufacturing variability. By carefully selecting and adjusting these parameters, the sense amplifier maintains high measurement precision across process variations without adding complexity through active compensation circuits.
4Measurement precision
If read window is reduced due to variability, then measurement precision deteriorates, but device complexity remains unchanged
Solution Approach 1:
The patent designs the sense amplifier to inherently tolerate manufacturing variability, cushioning against its detrimental effects on read window size. The circuit architecture ensures that the effective read window remains sufficiently large despite process variations, maintaining reliable cell state determination without requiring additional complexity.
Data Source
AI summary
A level shifter device comprises a first stage level shifter configured to transform an input signal to a first output signal having a voltage between at least one of a VPS control voltage and a ground or a VDD supply voltage and a VNS control voltage. The level shifter device comprises a second stage level shifter arranged subsequent to the first stage level shifter and configured to transform the first output signal to a second output signal having a voltage between the ground and the VDD supply voltage.