Two-Stage PLL Local Oscillator Generation for Fast UWB Switching

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Solution Overview

Problem

Existing UWB systems, such as those following the WiMedia standard, face challenges in generating and switching between multiple local oscillator (LO) frequencies within tight time constraints and maintaining phase coherency, which current approaches like phase-locked loops and digital controlled oscillators fail to adequately address.

Innovation Solution

A two-step phase-locked loop (PLL) circuit is employed, where a first-stage PLL generates a reference signal that is fed into multiple second-stage PLLs, each producing a local oscillator signal with a consistent frequency offset, eliminating the need for mixers and allowing for improved phase noise suppression and power savings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-stage PLL is used to generate multiple LO frequencies, then the circuit complexity is reduced, but the switching speed between frequencies cannot meet the requirement of less than 10 ns

Engineering Contradiction:

Improvecircuit complexityVSAvoidswitching speed

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The patent divides the frequency generation system into two stages: a first-stage PLL that generates a common reference signal and multiple second-stage PLLs that generate different LO frequencies. This segmentation allows each PLL to be optimized for specific functions, enabling fast switching between frequencies while maintaining manageable circuit complexity through modular architecture.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The first-stage PLL pre-generates a common reference signal that is distributed to all second-stage PLLs before frequency switching is needed. This preliminary action ensures that all necessary frequency components are ready in advance, enabling the second-stage PLLs to switch frequencies rapidly without waiting for reference signal generation during the switching event.

Inventive Principle:

Principle #10Preliminary action

2Speed

If multiple independent PLLs are used to generate each LO frequency, then the switching speed can be fast, but the phase coherency between frequencies cannot be maintained

Engineering Contradiction:

Improveswitching speedVSAvoidphase coherency

Core Design Contradiction:

SpeedVSStability of the object's composition

Solution Approach 1:

The first-stage PLL acts as an intermediary that provides a common reference signal to all second-stage PLLs. This intermediary reference signal synchronizes the phase relationships between all LO frequencies, ensuring phase coherency is maintained even as the second-stage PLLs rapidly switch between different frequency outputs.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If the reference frequency of a PLL is switched to generate different LO frequencies, then the number of PLLs can be reduced, but the required switching time of 300 ns for band group switching cannot be met

Engineering Contradiction:

Improvenumber of PLLsVSAvoidswitching time

Core Design Contradiction:

Device complexityVSLoss of time

Solution Approach 1:

The patent segments the frequency generation into two functional stages, allowing the first-stage PLL to remain fixed while only the second-stage PLLs need to switch frequencies. This segmentation reduces the effective switching time requirement from 300 ns for the entire system to much faster switching for individual second-stage PLLs, while still using a minimal number of PLL circuits.

Inventive Principle:

Principle #1Segmentation

4Speed

If digital PLL with DCO is used for frequency generation, then the frequency switching can be fast, but the required UWB LO signal characteristics cannot be achieved

Engineering Contradiction:

Improvefrequency switching speedVSAvoidLO signal quality

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent merges the advantages of analog PLLs (which provide excellent LO signal quality and phase coherency) with the fast switching capability of digital control. The two-stage architecture uses analog PLL circuits for frequency generation while incorporating digital frequency control mechanisms, achieving both fast switching and high-quality UWB LO signals that meet the required characteristics.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS7602254B2System and method for generating signals with a preselected frequency relationship in two steps

Publication Date: 2009.10.13 INFINEON TECHNOLOGIES AG

AI summary

System and method for generating multiple local oscillator signals comprising a first-stage phase-locked loop (PLL) having an input to receive a first reference signal input and having an output to transmit a second reference signal, wherein the second reference signal is an integer or fractional multiple of the first reference signal; and a plurality of second-stage PLLs, each second-stage PLL having an input coupled to the output of the first-stage PLL and receiving the second reference signal, and each second-stage PLL having an output for transmitting a local oscillator signal, wherein each of the local oscillator signals is an integer multiple of the second reference signal.